| 2012 | Test generator with preselected toggling for low power built-in self-test. | Janusz Rajski, Jerzy Tyszer, Grzegorz Mrugalski, Benoit Nadeau-Dostie |
| 2012 | Detection of gate-oxide defects with timing tests at reduced power supply. | Xi Qian, Chao Han, Adit D. Singh |
| 2012 | Derating based hardware optimizations in soft error tolerant designs. | V. Prasanth, Virendra Singh, Rubin A. Parekhji |
| 2012 | A SMT-based diagnostic test generation method for combinational circuits. | Sarvesh Prabhu, Michael S. Hsiao, Loganathan Lingappan, Vijay Gangaram |
| 2012 | Process variability-aware proactive reconfiguration technique for mitigating aging effects in nano scale SRAM lifetime. | Peyman Pouyan, Esteve Amat, Antonio Rubio |
| 2012 | Static test compaction for transition faults under the hazard-based detection conditions. | Irith Pomeranz |
| 2012 | An aging-aware flip-flop design based on accurate, run-time failure prediction. | Junyoung Park, Jacob A. Abraham |
| 2012 | Test algorithms for ECC-based memory repair in nanotechnologies. | Panagiota Papavramidou, Michael Nicolaidis |
| 2012 | Transition delay fault testing of 3D ICs with IR-drop study. | Shreepad Panth, Sung Kyu Lim |
| 2012 | Built-in-Self Test of transmitter I/Q mismatch using self-mixing envelope detector. | Afsaneh Nassery, Srinath Byregowda, Sule Ozev, Marian Verhelst, Mustapha Slamani |
| 2012 | Low-cost high-speed pseudo-random bit sequence characterization using nonuniform periodic sampling in the presence of noise. | Thomas Moon, Nicholas Tzou, Xian Wang, Hyun Woo Choi, Abhijit Chatterjee |
| 2012 | A novel capture-safety checking method for multi-clock designs and accuracy evaluation with delay capture circuits. | Kohei Miyase, Masao Aso, Ryou Ootsuka, Xiaoqing Wen, Hiroshi Furukawa, Yuta Yamato, Kazunari Enokimoto, Seiji Kajihara |
| 2012 | Towards a fully stand-alone analog/RF BIST: A cost-effective implementation of a neural classifier. | Dzmitry Maliuk, Nathan Kupp, Yiorgos Makris |
| 2012 | A Memory Failure Pattern Analyzer for memory diagnosis and repair. | Bing-Yang Lin, Mincent Lee, Cheng-Wen Wu |
| 2012 | Test generation for subtractive specification errors. | Patricia S. Lee, Ian G. Harris |
| 2012 | A Built-In Self-Test scheme for DDR memory output timing test and measurement. | Hyunjin Kim, Jacob A. Abraham |
| 2012 | Proof carrying-based information flow tracking for data secrecy protection and hardware trust. | Yier Jin, Yiorgos Makris |
| 2012 | An oscillation-based test structure for timing information extraction. | Eun Jung Jang, Anne Gattiker, Sani R. Nassif, Jacob A. Abraham |
| 2012 | A SAR ADC missing-decision level detection and removal technique. | Jiun-Lang Huang, X.-L. Huang, Yung-Fa Chou, Ding-Ming Kwai |
| 2012 | Comprehensive online defect diagnosis in on-chip networks. | Amirali Ghofrani, Ritesh Parikh, Saeed Shamshiri, Andrew DeOrio, Kwang-Ting Cheng, Valeria Bertacco |
| 2012 | Small-delay defects detection under process variation using Inter-Path Correlation. | Francisco J. Galarza-Medina, Jose Luis Garcia-Gervacio, Vctor H. Champac, Alex Orailoglu |
| 2012 | Are advanced DfT structures sufficient for preventing scan-attacks? | Jean DaRolt, Giorgio Di Natale, Marie-Lise Flottes, Bruno Rouzeyre |
| 2012 | SAT-ATPG using preferences for improved detection of complex defect mechanisms. | Alexander Czutro, Matthias Sauer, Tobias Schubert, Ilia Polian, Bernd Becker |
| 2012 | Test of phase interpolators in high speed I/Os using a sliding window search. | Ji Hwan (Paul) Chun, Siew Mooi Lim, Shao Chee Ong, Jae Wook Lee, Jacob A. Abraham |
| 2012 | Exploiting X-correlation in output compression via superset X-canceling. | Jinsuk Chung, Nur A. Touba |