| 2006 | A Test Generation Procedure for Avoiding the Detection of Functionally Redundant Transition Faults. | Hangkyu Lee, Irith Pomeranz, Sudhakar M. Reddy |
| 2006 | A Period Tracking Based On-Chip Sinusoidal Jitter Extraction Technique. | C.-Y. Kuo, J.-L. Huang |
| 2006 | Session Abstract. | Kee Sup Kim, Mohammad Tehranipoor |
| 2006 | Session Abstract. | Ajay Khoche, Mike Rodgers, Pete O'Neil |
| 2006 | Session Abstract. | Ajay Khoche, Peter Muhmenthaler |
| 2006 | Session Abstract. | Ajay Khoche |
| 2006 | Session Abstract. | Andr Ivanov |
| 2006 | An Error-Oriented Test Methodology to Improve Yield with Error-Tolerance. | Tong-Yu Hsieh, Kuen-Jong Lee, Melvin A. Breuer |
| 2006 | Integrated CMOS Power Sensors for RF BIST Applications. | Hsieh-Hung Hsieh, Liang-Hung Lu |
| 2006 | A Built-In Self-Repair Scheme for NOR-Type Flash Memory. | Yu-Ying Hsiao, Chao-Hsun Chen, Cheng-Wen Wu |
| 2006 | Session Abstract. | Kazumi Hatayama |
| 2006 | Minimal March Test Algorithm for Detection of Linked Static Faults in Random Access Memories. | Gurgen Harutunyan, Valery A. Vardanian, Yervant Zorian |
| 2006 | Evaluation of Test Metrics: Stuck-at, Bridge Coverage Estimate and Gate Exhaustive. | Ruifeng Guo, Subhasish Mitra, M. Enamul Amyeen, Jinkyu Lee, Srihari Sivaraj, Srikanth Venkataraman |
| 2006 | Improving Gate-Level ATPG by Traversing Concurrent EFSMs. | Giuseppe Di Guglielmo, Franco Fummi, Cristina Marconcini, Graziano Pravadelli |
| 2006 | BIST for Network-on-Chip Interconnect Infrastructures. | Cristian Grecu, Partha Pratim Pande, Andr Ivanov, Res Saleh |
| 2006 | An Overview of Failure Mechanisms in Embedded Flash Memories. | Olivier Ginez, Jean Michel Daga, Marylene Combe, Patrick Girard, Christian Landrault, Serge Pravossoudovitch, Arnaud Virazel |
| 2006 | Session Abstract. | Rajesh Galivanche, Bob Gottlieb |
| 2006 | A Gate-Level Method for Transistor-Level Bridging Fault Diagnosis. | Xinyue Fan, Will R. Moore, Camelia Hora, Mario Konijnenburg, Guido Gronthoud |
| 2006 | Iterative OPDD Based Signal Probability Calculation. | Avijit Dutta, Nur A. Touba |
| 2006 | Investigating the Efficiency of Integrator-Based Capacitor Array Testing Techniques. | Sai Raghuram Durbha, Amit Laknaur, Haibo Wang |
| 2006 | A Scheme for On-Chip Timing Characterization. | Ramyanshu Datta, Gary D. Carpenter, Kevin J. Nowka, Jacob A. Abraham |
| 2006 | Session Abstract. | Bernard Courtois |
| 2006 | Low-Cost Scan-Based Delay Testing of Latch-Based Circuits with Time Borrowing. | Kun Young Chung, Sandeep K. Gupta |
| 2006 | PEAKASO: Peak-Temperature Aware Scan-Vector Optimization. | Minsik Cho, David Z. Pan |
| 2006 | Session Abstract. | Erik Chmelar, Edward J. McCluskey |