| 2005 | At-Speed Transition Fault Testing With Low Speed Scan Enable. | Nisar Ahmed, C. P. Ravikumar, Mohammad Tehranipoor, Jim Plusquellic |
| 2005 | Hardware Results Demonstrating Defect Detection Using Power Supply Signal Measurements. | Dhruva Acharyya, Jim Plusquellic |
| 2005 | Diagnosis of Failing Component in RF Receivers through Adaptive Full-Path Measurements. | Erkan Acar, Sule Ozev |
| 2005 | Meeting the Test Challenges of the 1 Gbps Parallel RapidIO Interface with New Automatic Test Equipment Capabilities. | Darren Aaberge, Ken Mockler, Dieu Van Dinh, Raoul Belleau, Tim Donovan, Reid Hewlitt |
| 2004 | Hybrid BIST for System-on-a-Chip Using an Embedded FPGA Core. | Gang Zeng, Hideo Ito |
| 2004 | A Dual-Mode Built-In Self-Test Technique for Capacitive MEMS Devices. | Xingguo Xiong, Yu-Liang Wu, Wen-Ben Jone |
| 2004 | Efficient ATPG for Design Validation Based On Partitioned State Exploration Histories. | Qingwei Wu, Michael S. Hsiao |
| 2004 | Reducing Embedded SRAM Test Time under Redundancy Constraints. | Baosheng Wang, Josh Yang, James Cicalo, Andr Ivanov, Yervant Zorian |
| 2004 | GHz RF Front-end Bandwidth Time Domain Measurement. | Qi Wang, Yi Tang, Mani Soma |
| 2004 | An Experimental Study of N-Detect Scan ATPG Patterns on a Processor. | Srikanth Venkataraman, Srihari Sivaraj, M. Enamul Amyeen, Sangbong Lee, Ajay Ojha, Ruifeng Guo |
| 2004 | Built-in Current Sensor for ?I{DDQ} Testing of Deep Submicron Digital CMOS ICs. | Josep Rius Vzquez, Jos Pineda de Gyvez |
| 2004 | An On-Chip Transfer Function Characterization System for Analog Built-in Testing. | Alberto Valdes-Garcia, Jos Silva-Martnez, Edgar Snchez-Sinencio |
| 2004 | On New Current Signatures and Adaptive Test Technique Combination. | Claude Thibeault |
| 2004 | A Multi-Configuration Strategy for an Application Dependent Testing of FPGAs. | Mehdi Baradaran Tahoori, Edward J. McCluskey, Michel Renovell, Philippe Faure |
| 2004 | Defects and Faults in Quantum Cellular Automata at Nano Scale. | Mehdi Baradaran Tahoori, Mariam Momenzadeh, Jing Huang, Fabrizio Lombardi |
| 2004 | Changing the Scan Enable during Shift. | Nodari Sitchinava, Samitha Samaranayake, Rohit Kapur, Emil Gizdarski, Frederic Neuveux, Thomas W. Williams |
| 2004 | Fault Simulation Model for i{DDT} Testing: An Investigation. | Abhishek Singh, Chintan Patel, Jim Plusquellic |
| 2004 | A Methodology for Design and Evaluation of Redundancy Allocation Algorithms. | Samvel K. Shoukourian, Valery A. Vardanian, Yervant Zorian |
| 2004 | What Does Robust Testing a Subset of Paths, Tell us about the Untested Paths in the Circuit? | Manish Sharma, Janak H. Patel |
| 2004 | On Comparison of NCR Effectiveness with a Reduced I{DDQ} Vector Set. | Sagar S. Sabade, D. M. H. Walker |
| 2004 | Prediction of Analog Performance Parameters Using Oscillation Based Test. | Ashwin Raghunathan, Hongjoong Shin, Jacob A. Abraham, Abhijit Chatterjee |
| 2004 | Designing Reconfigurable Multiple Scan Chains for Systems-on-Chip. | Md. Saffat Quasem, Sandeep K. Gupta |
| 2004 | A Statistical Fault Coverage Metric for Realistic Path Delay Faults. | Wangqi Qiu, Xiang Lu, Jing Wang, Zhuo Li, D. M. H. Walker, Weiping Shi |
| 2004 | Wafer-level RF Test and DfT for VCO Modulating Transceiver Architecures. | Sule Ozev, Christian Olgaard |
| 2004 | A Scalable On-Chip Jitter Extraction Technique. | Chee-Kian Ong, Dongwoo Hong, Kwang-Ting Cheng, Li-C. Wang |