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IEEE VLSI Test Symposium

VTS

National

CORE rank

CORE rank (raw)

National/Regional

Fields of research

Computer Systems Engineering

Papers indexed

2,208

1991–2026

Papers per year

199189 peak2026

VTS papers

2,208 records sourced from DBLP. Search titles, filter by year, sort by recency.

YearTitleAuthors
2005On-Chip Spectrum Analyzer for Analog Built-In Self Test.Anup P. Jose, Keith A. Jenkins, Scott K. Reynolds
2005Cantilever Type Probe Card for At-Speed Memory Test on Wafer.Hitoshi Iwai, Atsushi Nakayama, Naoko Itoga, Kotaro Omata
2005An Efficient Random Jitter Measurement Technique Using Fast Comparator Sampling.Dongwoo Hong, Cameron Dryden, Gordon Saksena
2005Minimal March Tests for Unlinked Static Faults in Random Access Memories.Gurgen Harutunyan, Valery A. Vardanian, Yervant Zorian
2005Low-Cost Alternate EVM Test for Wireless Receiver Systems.Achintya Halder, Abhijit Chatterjee
2005Implementing a Scheme for External Deterministic Self-Test.Abdul Wahid Hakmi, Hans-Joachim Wunderlich, Valentin Gherman, Michael Garbers, Jrgen Schlffel
2005Synthesis of Low Power CED Circuits Based on Parity Codes.Shalini Ghosh, Sugato Basu, Nur A. Touba
2005On-Chip Electro-Thermal Stimulus Generation for a MEMS-Based Magnetic Field Sensor.Norbert Dumas, Florence Azas, Laurent Latorre, Pascal Nouet
2005Survey of Design and Process Failure Modes for High-Speed SerDes in Nanometer CMOS.Cameron Dryden
2005Design of Adaptive Nanometer Digital Systems for Effective Control of Soft Error Tolerance.Abdulkadir Utku Diril, Yuvraj Singh Dhillon, Abhijit Chatterjee, Adit D. Singh
2005Data Retention Fault in SRAM Memories: Analysis and Detection Procedures.Luigi Dilillo, Patrick Girard, Serge Pravossoudovitch, Arnaud Virazel, Magali Bastian Hage-Hassan
2005Diagnosis of Arbitrary Defects Using Neighborhood Function Extraction.Rao Desineni, R. D. (Shawn) Blanton
2005Towards an Understanding of No Trouble Found Devices.Scott Davidson
2005Jump Scan: A DFT Technique for Low Power Testing.Min-Hao Chiu, Chien-Mo James Li
2005Modeling and Testing of SRAM for New Failure Mechanisms Due to Process Variations in Nanoscale CMOS.Qikai Chen, Hamid Mahmoodi-Meimand, Swarup Bhunia, Kaushik Roy
2005Transition Tests for High Performance Microprocessors.Yi-Shing Chang, Sreejit Chakravarty, Hiep Hoang, Nick Thorpe, Khen Wee
2005Experimental Evaluation of Bridge Patterns for a High Performance Microprocessor.Sreejit Chakravarty, Yi-Shing Chang, Hiep Hoang, Sridhar Jayaraman, Silvio Picano, Cheryl Prunty, Eric W. Savage, Rehan Sheikh, Eric N. Tran, Khen Wee
2005A Built-in Self-Test Method for Write-only Content Addressable Memories.Dilip K. Bhavsar
2005Production Test Methods for Measuring 'Out-of-Band' Interference of Ultra Wide Band (UWB) Devices.Soumendu Bhattacharya, Abhijit Chatterjee
2005Measures to Improve Delay Fault Testing on Low-Cost Testers - A Case Study.Matthias Beck, Olivier Barondeau, Frank Poehl, Xijiang Lin, Ron Press
2005Highly Configurable Programmable Built-In Self Test Architecture for High-Speed Memories.Ismet Bayraktaroglu, Olivier Caty, Yickkei Wong
2005A New Algorithm for Dynamic Faults Detection in RAMs.Mohamed Azimane, Ananta K. Majhi, Guido Gronthoud, Maurice Lousberg
2005Soft Error Mitigation for SRAM-Based FPGAs.Ghazanfar Asadi, Mehdi Baradaran Tahoori
2005Segmented Addressable Scan Architecture.Ahmad A. Al-Yamani, Erik Chmelar, Mikhail Grinchuck
2005Built-In Test of RF Components Using Mapped Feature Extraction Sensors.Selim Sermet Akbay, Abhijit Chatterjee
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