IEEE VLSI Test Symposium

VTS

National

CORE rank

CORE rank (raw)

National/Regional

Fields of research

Computer Systems Engineering

Papers indexed

2,208

1991–2026

Best Computer Systems Engineering conferences

Papers per year

199189 peak2026

Most published authors

VTS papers

2,208 records sourced from DBLP. Search titles, filter by year, sort by recency.

Year	Title	Authors
2004	A Diversified Memory Built-In Self-Repair Approach for Nanotechnologies.	Michael Nicolaidis, Nadir Achouri, Lorena Anghel
2004	Generating At-Speed Array Fail Maps with Low-Speed ATE.	Michael R. Nelms, Kevin W. Gorman, Darren Anand
2004	Razor: A Tool for Post-Silicon Scan ATPG Pattern Debug and Its Application.	Debashis Nayak, Srikanth Venkataraman, Paul J. Thadikaran
2004	Planar High Performance Ring Generators.	Grzegorz Mrugalski, Nilanjan Mukherjee, Janusz Rajski, Jerzy Tyszer
2004	Design of Wireless Sub-Micron Characterization System.	Brian Moore, Christopher J. Backhouse, Martin Margala
2004	Delay Defect Screening using Process Monitor Structures.	Subhasish Mitra, Erik H. Volkerink, Edward J. McCluskey, Stefan Eichenberger
2004	ELF-Murphy Data on Defects and Test Sets.	Edward J. McCluskey, Ahmad A. Al-Yamani, Chien-Mo James Li, Chao-Wen Tseng, Erik H. Volkerink, Franois-Fabien Ferhani, Edward Li, Subhasish Mitra
2004	BIST Technique by Equally Spaced Test Vector Sequences.	Salvador Manich, L. Garca, Luz Balado, Emili Lupon, Josep Rius, Rosa Rodrguez-Montas, Joan Figueras
2004	Detection of Temperature Sensitive Defects Using ZTC.	Ethan Long, W. Robert Daasch, Robert Madge, Brady Benware
2004	Defect-Aware SOC Test Scheduling.	Erik Larsson, Julien Pouget, Zebo Peng
2004	Logic BIST Using Constrained Scan Cells.	Liyang Lai, Thomas Rinderknecht, Wu-Tung Cheng, Janak H. Patel
2004	3-Stage Variable Length Continuous-Flow Scan Vector Decompression Scheme.	C. V. Krishna, Nur A. Touba
2004	Boundary Scan for 5-GHz RF Pins Using LC Isolation Networks.	Tian-Wei Huang, Pei-Si Wu, Ren-Chieh Liu, Jeng-Han Tsai, Huei Wang, Tzi-Dar Chiueh
2004	Soft Delay Error Effects in CMOS Combinational Circuits.	Balkaran S. Gill, Christos A. Papachristou, Francis G. Wolff
2004	The Pros and Cons of Very-Low-Voltage Testing: An Analysis based on Resistive Bridging Faults.	Piet Engelke, Ilia Polian, Michel Renovell, Bharath Seshadri, Bernd Becker
2004	Testing Systems Wirelessly.	Hans Eberle, Arvinderpal Wander, Nils Gura
2004	Excitation, Observation, and ELF-MD: Optimization Criteria for High Quality Test Sets.	Jennifer Dworak, David Dorsey, Amy Wang, M. Ray Mercer
2004	Memory BIST Using ESP.	Xiaogang Du, Sudhakar M. Reddy, Don E. Ross, Wu-Tung Cheng, Joseph Rayhawk
2004	March iC-: An Improved Version of March C- for ADOFs Detection.	Luigi Dilillo, Patrick Girard, Serge Pravossoudovitch, Arnaud Virazel, Simone Borri
2004	Multi-Modal Built-In Self-Test for Symmetric Microsystems.	Nilmoni Deb, R. D. (Shawn) Blanton
2004	FPGA Bridging Fault Detection and Location via Differential I{DDQ}.	Erik Chmelar, Shahin Toutounchi
2004	Generalized Sensitization using Fault Tuples.	Sounil Biswas, Kumar N. Dwarakanath, R. D. (Shawn) Blanton
2004	System-level Testing of RF Transmitter Specifications Using Optimized Periodic Bitstreams.	Soumendu Bhattacharya, Ganesh Srinivasan, Sasikumar Cherubal, Achintya Halder, Abhijit Chatterjee
2004	An Approach to the Built-In Self-Test of Field Programmable Analog Arrays.	Tiago R. Balen, Antonio Andrade Jr., Florence Azas, Marcelo Lubaszewski, Michel Renovell
2004	New Test Methodology for Resistive Open Defect Detection in Memory Address Decoders.	Mohamed Azimane, Ananta K. Majhi

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