| 2024 | Innovative Practices Track: Session 7 Yield Optimization, Reducing Costs, and Improving Quality. | Carl S. Moore |
| 2024 | WaferCap: Open Classification of Wafer Map Patterns using Deep Capsule Network. | Abhishek Kumar Mishra, Mohammad Ershad Shaik, Anush Niranjan Lingamoorthy, Suman Kumar, Anup Das, Nagarajan Kandasamy, Nur A. Touba |
| 2024 | Error Resilient Hyperdimensional Computing Using Hypervector Encoding and Cross-Clustering. | Mohamed Mejri, Chandramouli N. Amarnath, Abhijit Chatterjee |
| 2024 | Reliability analysis and mitigation for analog computation-in-memory: from technology to application. | Mahta Mayahinia, Haneen G. Hezayyin, Mehdi B. Tahoori |
| 2024 | IEEE Std P3405: New Standard-under-Development for Chiplet Interconnect Test and Repair. | Erik Jan Marinissen, Vineet Pancholi, Po-Yao Chuang, Martin Keim |
| 2024 | Multi-Level Reference for Test Coverage Enhancement of Resistive-Based NVM. | Sina Bakhtavari Mamaghani, Jongsin Yun, Martin Keim, Mehdi B. Tahoori |
| 2024 | AlN Sputtering Parameter Estimation Using A Multichannel Parallel DCT Neural Network. | Yingyi Luo, Talha M. Khan, Emadeldeen Hamdan, Xin Zhu, Hongyi Pan, Didem Ozevin, A. Enis etin |
| 2024 | Transformer and Its Variants for Identifying Good Dice in Bad Neighborhoods. | Cheng-Che Lu, Chi-Chih Chang, Chia-Heng Yen, Shuo-Wen Chang, Ying-Hua Chu, Kai-Chiang Wu, Mango Chia-Tso Chao |
| 2024 | Domain-Adapted LLMs for VLSI Design and Verification: A Case Study on Formal Verification. | Mingjie Liu, Minwoo Kang, Ghaith Bany Hamad, Syed Suhaib, Haoxing Ren |
| 2024 | Built in self test (BIST) for RSFQ circuits. | Mingye Li, Yunkun Lin, Sandeep Gupta |
| 2024 | Practical Considerations on ESD Testing. | Xunyu Li, Weiquan Hao, Zijin Pan, Yunru Miao, Zijian Yue, Albert Wang |
| 2024 | Structural Built In Self Test of Analog Circuits using ON/OFF Keying and Delay Monitors. | Suhas Krishna Kashyap, Chinmaye Raghavendra, Suriyaprakash Natarajan, Sule Ozev |
| 2024 | LLMs for Hardware Security: Boon or Bane? | Rahul Kande, Vasudev Gohil, Matthew DeLorenzo, Chen Chen, Jeyavijayan Rajendran |
| 2024 | Testing a Transistor-Level Programmable Fabric: Challenges and Solutions. | Apurva Jain, Thomas Broadfoot, Carl Sechen, Yiorgos Makris |
| 2024 | Testing and Fault Diagnosis for Multi-level Resistive Random-Access Memory in Monolithic 3D Integration. | Shao-Chun Hung, Partho Bhoumik, Krishnendu Chakrabarty |
| 2024 | Enhanced Wear-Out Sensor Design in a 12nm Process for Separable Stress Regime Monitoring. | Ian Hill, Mateo Rendn, Andr Ivanov |
| 2024 | Evaluating the Reliability of Supervised Compression for Split Computing. | Juan-David Guerrero-Balaguera, Josie E. Rodriguez Condia, Marco Levorato, Matteo Sonza Reorda |
| 2024 | A Storage Based LBIST Scheme for Logic Diagnosis. | Subashini Gopalsamy, Irith Pomeranz |
| 2024 | Sequential Decoders for Binary Linear Block ECCs. | Valentin Gherman, Cyrille Laffond |
| 2024 | A High Level Synthesis Methodology for Dynamic Monitoring of FPGA ML Accelerators. | Ryan F. Forelli, Rui Shi, Seda Ogrenci, Joshua Agar |
| 2024 | Artificial Intelligence Based High Power Calibration Method for RF Pulse Amplifiers. | Abdullah Eroglu, M. N. Mahmoud |
| 2024 | Scenario-based Test Content Optimization: Scan Test vs. System-Level Test. | Nourhan Elhamawy, Jens Anders, Ilia Polian, Matthias Sauer |
| 2024 | Analyzing and Mitigating Circuit Aging Effects in Deep Learning Accelerators. | Sanjay Das, Shamik Kundu, Anand Menon, Yihui Ren, Shubha R. Kharel, Kanad Basu |
| 2024 | OpenROAD and CircuitOps: Infrastructure for ML EDA Research and Education. | Vidya A. Chhabria, Wenjing Jiang, Andrew B. Kahng, Rongjian Liang, Haoxing Ren, Sachin S. Sapatnekar, Bing-Yue Wu |
| 2024 | Innovative Practices Track: Session 6 - Using AI to Address the Silicon Growth Curve. | Duane Brown, Ira Leventhal, Sri Ganta, Keith Schaub |