IEEE VLSI Test Symposium
VTS
National
CORE rank
CORE rank (raw)
National/Regional
Fields of research
Computer Systems Engineering
Papers indexed
2,208
1991–2026
Papers per year
199189 peak2026
Most published authors
VTS papers
2,208 records sourced from DBLP. Search titles, filter by year, sort by recency.
| Year | Title | Authors |
|---|---|---|
| 2024 | Machine Learning Based Static and Dynamic Error Calibration in Data Converters. | Sumukh Prashant Bhanushali, Tushar Gupta, Debnath Maiti, Arindam Sanyal |
| 2024 | Calibration and Source Localization Using an Array of Resistive Metal Oxide Gas Sensors. | Ishaan Bassi, Sule Ozev |
| 2024 | Reliable edge machine learning hardware for scientific applications. | Tommaso Baldi, Javier Campos, Benjamin Hawks, Jennifer Ngadiuba, Nhan Tran, Daniel Diaz, Javier M. Duarte, Ryan Kastner, Andres Meza, Melissa Quinnan, Olivia Weng, Caleb Geniesse, Amir Gholami, Michael W. Mahoney, Vladimir Loncar, Philip C. Harris, Joshua Agar, Shuyu Qin |
| 2024 | Multi-Parameter Optimization of mm-Wave Antenna Layout Using Hybrid Modeling and Incremental Model Learning. | Ferhat Can Ataman, Mohammed Aladsani, Y. B. Chethan Kumar, Georgios Trichopoulos, Sule Ozev |
| 2024 | NN-ECC: Embedding Error Correction Codes in Neural Network Weight Memories using Multi-task Learning. | Soyed Tuhin Ahmed, Surendra Hemaram, Mehdi B. Tahoori |
| 2024 | Special Session: Reliability Assessment Recipes for DNN Accelerators. | Mohammad Hasan Ahmadilivani, Alberto Bosio, Bastien Deveautour, Fernando Fernandes dos Santos, Juan-David Guerrero-Balaguera, Maksim Jenihhin, Angeliki Kritikakou, Robert Limas Sierra, Salvatore Pappalardo, Jaan Raik, Josie E. Rodriguez Condia, Matteo Sonza Reorda, Mahdi Taheri, Marcello Traiola |
| 2024 | On the Sensitivity of Analog Artificial Neural Network Models to Process Variation. | N. Afroz, A. Sayem, Georgios Volanis, Dzmitry Maliuk, Haralampos-G. Stratigopoulos, Yiorgos Makris |
| 2024 | Innovative Practices Session at VLSI Test Symposium 2024: Analog Testing Technologies for Digital Exploding Society. | Haruo Kobayashi, Naoki Tsukahara, Keno Sato, Takashi Oshima |
| 2023 | Reliable Brain-inspired AI Accelerators using Classical and Emerging Memories. | Mikail Yayla, Simon Thomann, Md. Mazharul Islam, Ming-Liang Wei, Shu-Yin Ho, Ahmedullah Aziz, Chia-Lin Yang, Jian-Jia Chen, Hussam Amrouch |
| 2023 | IP Session on Chiplet: Design, Assembly, and Test. | Bapi Vinnakota, Jaber Derakhshandeh, Eric Beyne, Erik Jan Marinissen, Sreejit Chakravarty |
| 2023 | A Novel LBIST Signature Computation Method for Automotive Microcontrollers using a Digital Twin. | Daniel Tille, Leon Klimasch, Sebastian Huhn |
| 2023 | Innovation Practices Track: Testability and Dependability of AI Hardware and Autonomous Systems. | Fei Su, Eric Zhang, Arjun Chaudhuri, Michael Paulitsch |
| 2023 | Innovation Practices Track: VLSI Functional Safety. | Fei Su, Meirav Nitzan, Ankush Sethi, Vaibhav Kumar, Dan Alexandrescu |
| 2023 | Innovation Practices Track: Silicon Lifecycle Management Challenges and Opportunities. | Fei Su, Xiankun Robert Jin, Nilanjan Mukherjee, Yervant Zorian |
| 2023 | Innovation Practices Track: Innovation on Telemetry Monitoring. | Fei Su, Marc Hunter, Chen He, Sashi Obilisetty |
| 2023 | Silent Data Errors: Sources, Detection, and Modeling. | Adit D. Singh, Sreejit Chakravarty, George Papadimitriou, Dimitris Gizopoulos |
| 2023 | Predicting the Silent Data Error Prone Devices Using Machine Learning. | Mohammad Ershad Shaik, Abhishek Kumar Mishra, Yonghyun Kim |
| 2023 | Targeted Custom High-Voltage Stress Patterns on Automotive Designs. | Saidapet Ramesh, Kristofor Dickson, Akshay Jaiswal, Robert Marchese, Kiran Sunny Thota |
| 2023 | CAPEC: A Cellular Automata Guided FSM-based IP Authentication Scheme. | Mridha Md Mashahedur Rahman, M. Sazadur Rahman, Rasheed Kibria, Mike Borza, Bandy Reddy, Adam Cron, Fahim Rahman, Mark Tehranipoor, Farimah Farahmandi |
| 2023 | Refreshing the JTAG Family. | Michele Portolan, Martin Keim, Jeff Rearick, Heiko Ehrenberg |
| 2023 | Compact Set of Functional Broadside Tests with Fault Detection on Primary Outputs. | Irith Pomeranz |
| 2023 | Expanding a Pool of Functional Test Sequences to Support Test Compaction. | Irith Pomeranz |
| 2023 | Special Session: Neuromorphic hardware design and reliability from traditional CMOS to emerging technologies. | Fabio Pavanello, Elena-Ioana Vatajelu, Alberto Bosio, Thomas Van Vaerenbergh, Peter Bienstman, Benot Charbonnier, Alessio Carpegna, Stefano Di Carlo, Alessandro Savino |
| 2023 | An Efficient External Memory Test Solution: Case Study for HPC Application. | Keqing Ouyang, Minqiang Peng, Yunnong Zhu, Kang Qi, Grigor Tshagharyan, Arun Kumar, Gurgen Harutyunyan, Isaac Wang |
| 2023 | Machine Learning-Based Adaptive Outlier Detection for Underkill Reduction in Analog/RF IC Testing. | V. A. Niranjan, Deepika Neethirajan, Constantinos Xanthopoulos, D. Webster, Amit Nahar, Yiorgos Makris |
201–225 of 2,208← PreviousNext →
Comparable venues
Other A*/A conferences filed under the same field of research.
- ADATEDesign, Automation and Test in Europe Conference
- A*DACDesign Automation Conf
- ASCInternational Conference for High Performance Computing, Networking, Storage and Analysis (was Supercomputing Conference)
- AICCADIEEE/ACM International Conference on Computer-Aided Design
- AITCIEEE International Test Conference
- A*ISCAACM International Symposium on Computer Architecture
- A*MICROInternational Symposium on Microarchitecture
- AISLPEDIEEE/ACM International Symposium on Low Power Electronics and Design