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IEEE VLSI Test Symposium

VTS

National

CORE rank

CORE rank (raw)

National/Regional

Fields of research

Computer Systems Engineering

Papers indexed

2,208

1991–2026

Papers per year

199189 peak2026

VTS papers

2,208 records sourced from DBLP. Search titles, filter by year, sort by recency.

YearTitleAuthors
1994Test generation and three-state elements, buses, and bidirectionals.J. Th. van der Linden, M. H. Konijnenburg, Ad J. van de Goor
1994Test embedding with discrete logarithms.Mody Lempel, Sandeep K. Gupta, Melvin A. Breuer
1994Sequential test generation with reduced test clocks for partial scan designs.Soo Young Lee, Kewal K. Saluja
1994Circuit-level dictionaries of CMOS bridging faults.Terry Lee, Weitong Chuang, Ibrahim N. Hajj, W. Kent Fuchs
1994Designing self-exercising analogue checkers.Vladimir Kolarik, Marcelo Lubaszewski, Bernard Courtois
1994Novel architectures for TSC/CD and SFS/SCD synchronous controllers.Sayed Mohammad Kia, Sri Parameswaran
1994Realization of fully path-delay-fault testable non-scan sequential circuits.Wuudiann Ke, Premachandran R. Menon
1994On compacting test sets by addition and removal of test vectors.Seiji Kajihara, Irith Pomeranz, Kozo Kinoshita, Sudhakar M. Reddy
1994A design for testability technique for test pattern generation with LFSRs.Dimitrios Kagaris, Spyros Tragoudas
1994Analyzing the design-for-test techniques in a multiple substrate MCM.Joel A. Jorgenson, Russell J. Wagner
1994Aliasing error for a mask ROM built-in self-test.Kazuhiko Iwasaki, Akinori Furuta, Shigeo Nakamura
1994Analysis of IEugeni Isern, Joan Figueras
1994FACTS: fault coverage estimation by test vector sampling.Keerthi Heragu, Vishwani D. Agrawal, Michael L. Bushnell
1994Analog circuit observer blocks.Ramesh Harjani, Bapiraju Vinnakota
1994Code disjoint self-parity combinational circuits for self-testing, concurrent fault detection and parity scan design.Michael Gssel, Egor S. Sogomonyan
1994Fault models and tests for Ring Address Type FIFOs.Ad J. van de Goor, Ivo Schanstra, Yervant Zorian
1994Automating the verification of memory tests.Ad J. van de Goor, B. Smit
1994Functional design verification for the PowerPC 601 microprocessor.Scott Glenn, Gavin Meil, Ed Rodriguez, Jeff Brooks
1994A new high level testability measure: description and evaluation.M.-H. Gentil, Didier Crestani, Abdennour El Rhalibi, C. Durante
1994Linear finite state machine for lD ILAs.Murali M. R. Gala, Peter Utama, Don E. Ross, Karan L. Watson
1994Three-pattern tests for delay faults.Piero Franco, Edward J. McCluskey
1994On-line delay testing of digital circuits.Piero Franco, Edward J. McCluskey
1994Fault detection and fault localization using IChristian Elm, Djamshid Tavangarian
1994Delay-fault testability preservation of the concurrent decomposition and factorization transformations.Aiman El-Maleh, Janusz Rajski
1994Synthesizing designs with low-cardinality minimum feedback vertex set for partial scan application.Sujit Dey, Miodrag Potkonjak, Rabindra K. Roy
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