Arnaud Virazel
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
106
Venues
8
Active years
2000–2026
Best venue rank
A*
Where they publish
Papers
106 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2026 | ETS | Exploiting Near-Memory Computing Resources for Native, Adaptive, and Low-Overhead MBIST. | Sabrina Ait Belkacem, Lila Ammoura, Maria Ramirez-Corrales, Marie-Lise Flottes, Patrick Girard, Jean-Philippe Noel, Arnaud Virazel |
| 2026 | VTS | Enhancing Testability & Security of Near-Memory Computing Architectures. | Hichem Benamara, Sabrina Ait Belkacem, Maria Ramirez-Corrales, Lorenzo Ciampolini, Jean-Philippe Noel, Maha Kooli, Lila Ammoura, Ian O'Connor, Patrick Girard, Arnaud Virazel |
| 2026 | VTS | Pre-processing Functional And Physical Defect Equivalences To Accelerate Cell-Aware Model Generation. | Reza Khoshzaban, Gianmarco Mongelli, Dorian Ronga, Iacopo Guglielminetti, Michelangelo Grosso, Eric Faehn, Patrick Girard, Arnaud Virazel, Riccardo Cantoro |
| 2025 | DATE | Accelerating Cell-Aware Model Generation for Sequential Cells using Graph Theory. | Gianmarco Mongelli, Eric Faehn, Dylan Robins, Patrick Girard, Arnaud Virazel |
| 2025 | ETS | European Test Symposium Teams: an Anniversary Snapshot. | Maksim Jenihhin, Jaan Raik, Artur Jutman, Natalia Cherezova, Raimund Ubar, Liviu Miclea, Szilrd Enyedi, Iulia Stefan, Ovidiu Stan, Cosmina Corches, Zebo Peng, Petru Eles, Rolf Drechsler, S. Eggersgl, Grschwin Fey, Andreas Glowatz, Daniel Tille, Georges G. E. Gielen, Anthony Coyette, Wim Dobbelaere, Ronny Vanhooren, Po-Yao Chuang, Erik Jan Marinissen, Giorgio Di Natale, M. Barragan, Paolo Maistri, S. Mir, Vatajelu I. Vatajelu, Paolo Bernardi, Stefano Di Carlo, Paolo Prinetto, Matteo Sonza Reorda, Massimo Violante, Haralampos-G. Stratigopoulos, M. K. Michael, Stelios Neophytou, Stavros Hadjitheophanous, Kyriakos Christou, M. Skitsas, Alberto Bosio, Bastien Deveautour, Patrick Girard, Marcello Traiola, Arnaud Virazel, Fernando Fernandes dos Santos, Angeliki Kritikakou, Gioele Casagranda, Marzio Vallero, Flavio Vella, Paolo Rech, Letcia Maria Bolzani Poehls, Milos Krstic, Marko S. Andjelkovic, Fabian Luis Vargas, Grigor Tshagharyan, Gurgen Harutyunyan, Valery A. Vardanian, Samvel K. Shoukourian, Yervant Zorian, Jennifer Dworak, Kundan Nepal, Theodore W. Manikas, Mottaqiallah Taouil, Moritz Fieback, Anteneh Gebregiorgis, Rajendra Bishnoi, Said Hamdioui, Abhijit Chatterjee, Anurup Saha, Suhasini Komarraju, K. Ma, Chandramouli N. Amarnath, Mehdi Baradaran Tahoori, Mahta Mayahinia, Maryam Rajabalipanah, Katayoon Basharkhah, N. Nosrati, Zahra Jahanpeima, Zain Navabi, Hans-Joachim Wunderlich, Sybille Hellebrand |
| 2025 | IOLTS | A Runtime Efficient Graph-Based Cell-Aware Model Generation for Structural SRAM Testing. | Gianmarco Mongelli, Xhesila Xhafa, Eric Faehn, Dylan Robins, Patrick Girard, Arnaud Virazel |
| 2025 | IOLTS | A Digital SRAM Modeling for Cell-Aware Testing and Test Algorithms Evaluation. | Dorian Ronga, Xhesila Xhafa, Eric Faehn, Patrick Girard, T. Vayssade, Arnaud Virazel |
| 2024 | DATE | A Novel March Test Algorithm for Testing 8T SRAM-Based IMC Architectures. | Lila Ammoura, Marie-Lise Flottes, Patrick Girard, Jean-Philippe Noel, Arnaud Virazel |
| 2024 | IOLTS | A Graph-Based Methodology for Speeding up Cell-Aware Model Generation. | Gianmarco Mongelli, Xhesila Xhafa, Eric Faehn, Dylan Robins, Patrick Girard, Arnaud Virazel |
| 2024 | ITC | A Fast and Efficient Graph-Based Methodology for Cell-Aware Model Generation. | Gianmarco Mongelli, Eric Faehn, Dylan Robins, Patrick Girard, Arnaud Virazel |
| 2023 | ETS | Intra-cell Resistive-Open Defect Analysis on a Foundry 8T SRAM-based IMC Architecture. | Lila Ammoura, Marie-Lise Flottes, Patrick Girard, Jean-Philippe Noel, Arnaud Virazel |
| 2023 | ETS | Learning-Based Characterization Models for Quality Assurance of Emerging Memory Technologies. | Xhesila Xhafa, Patrick Girard, Arnaud Virazel |
| 2023 | ETS | On Using Cell-Aware Methodology for SRAM Bit Cell Testing. | Xhesila Xhafa, Aymen Ladhar, Eric Faehn, Lorena Anghel, Gregory di Pendina, Patrick Girard, Arnaud Virazel |
| 2023 | ITC | Predictor BIST: An "All-in-One" Optical Test Solution for CMOS Image Sensors. | Julia Lefevre, P. Debaud, Patrick Girard, Arnaud Virazel |
| 2022 | ETS | Effective techniques for automatically improving the transition delay fault coverage of Self-Test Libraries. | Riccardo Cantoro, Francesco Garau, Patrick Girard, Nima Kolahimahmoudi, Sandro Sartoni, Matteo Sonza Reorda, Arnaud Virazel |
| 2022 | ETS | A Lightweight, Plug-and-Play and Autonomous JTAG Authentication IP for Secure Device Testing. | S. Lapeyre, Nicolas Valette, Marc Merandat, Marie-Lise Flottes, Bruno Rouzeyre, Arnaud Virazel |
| 2022 | ETS | A Generic Fast and Low Cost BIST Solution for CMOS Image Sensors. | Julia Lefevre, P. Debaud, Patrick Girard, Arnaud Virazel |
| 2022 | ITC | A Comprehensive Learning-Based Flow for Cell-Aware Model Generation. | P. D'Hondt, Aymen Ladhar, Patrick Girard, Arnaud Virazel |
| 2021 | DATE | A Learning-Based Methodology for Accelerating Cell-Aware Model Generation. | P. D'Hondt, Aymen Ladhar, Patrick Girard, Arnaud Virazel |
| 2021 | ETS | Emerging Computing Devices: Challenges and Opportunities for Test and Reliability | Alberto Bosio, Ian O'Connor, Marcello Traiola, Jorge Echavarria, Jrgen Teich, Muhammad Abdullah Hanif, Muhammad Shafique, Said Hamdioui, Bastien Deveautour, Patrick Girard, Arnaud Virazel, Koen Bertels |
| 2021 | ETS | A Plug and Play Digital ABIST Controller for Analog Sensors in Secure Devices. | S. Lapeyre, Nicolas Valette, Marc Merandat, Marie-Lise Flottes, Bruno Rouzeyre, Arnaud Virazel |
| 2021 | IOLTS | Self-Test Libraries Analysis for Pipelined Processors Transition Fault Coverage Improvement. | Riccardo Cantoro, Patrick Girard, Riccardo Masante, Sandro Sartoni, Matteo Sonza Reorda, Arnaud Virazel |
| 2021 | IOLTS | Reducing Overprovision of Triple Modular Reduncancy Owing to Approximate Computing. | Bastien Deveautour, Marcello Traiola, Arnaud Virazel, Patrick Girard |
| 2021 | ITC | A Fast and Low Cost Embedded Test Solution for CMOS Image Sensors. | Julia Lefevre, Philippe Debaud, Patrick Girard, Arnaud Virazel |
| 2020 | DATE | Maximizing Yield for Approximate Integrated Circuits. | Marcello Traiola, Arnaud Virazel, Patrick Girard, Mario Barbareschi, Alberto Bosio |
| 2020 | ETS | Design, Verification, Test and In-Field Implications of Approximate Computing Systems. | Alberto Bosio, Stefano Di Carlo, Patrick Girard, Ernesto Snchez, Alessandro Savino, Luks Sekanina, Marcello Traiola, Zdenek Vascek, Arnaud Virazel |
| 2020 | ETS | QAMR: an Approximation-Based Fully Reliable TMR Alternative for Area Overhead Reduction. | Bastien Deveautour, Marcello Traiola, Arnaud Virazel, Patrick Girard |
| 2020 | ETS | Learning-Based Cell-Aware Defect Diagnosis of Customer Returns. | Safa Mhamdi, Patrick Girard, Arnaud Virazel, Alberto Bosio, Aymen Ladhar |
| 2020 | IOLTS | Development and Application of Embedded Test Instruments to Digital, Analog/RFs and Secure ICs. | Florence Azas, Serge Bernard, Mariane Comte, Bastien Deveautour, Sophie Dupuis, Hassan El Badawi, Marie-Lise Flottes, Patrick Girard, Vincent Kerzrho, Laurent Latorre, Franois Lefvre, Bruno Rouzeyre, Emanuele Valea, T. Vayssade, Arnaud Virazel |
| 2020 | IOLTS | A CMOS OxRAM-Based Neuron Circuit Hardened with Enclosed Layout Transistors for Aerospace Applications. | Pablo Ilha Vaz, Patrick Girard, Arnaud Virazel, Hassen Aziza |
| 2020 | ITC | A Learning-Based Cell-Aware Diagnosis Flow for Industrial Customer Returns. | Safa Mhamdi, Patrick Girard, Arnaud Virazel, Alberto Bosio, Aymen Ladhar |
| 2019 | IOLTS | Towards Improvement of Mission Mode Failure Diagnosis for System-on-Chip. | Safa Mhamdi, Arnaud Virazel, Patrick Girard, Alberto Bosio, Etienne Auvray, Eric Faehn, Aymen Ladhar |
| 2018 | DDECS | On the Comparison of Different ATPG Approaches for Approximate Integrated Circuits. | Marcello Traiola, Arnaud Virazel, Patrick Girard, Mario Barbareschi, Alberto Bosio |
| 2018 | ITC | An Effective Intra-Cell Diagnosis Flow for Industrial SRAMs. | Tien-Phu Ho, Eric Faehn, Arnaud Virazel, Alberto Bosio, Patrick Girard |
| 2017 | DDECS | Towards approximation during test of Integrated Circuits. | Imran Wali, Marcello Traiola, Arnaud Virazel, Patrick Girard, Mario Barbareschi, Alberto Bosio |
| 2016 | DDECS | A hybrid power modeling approach to enhance high-level power models. | Alejandro Nocua, Arnaud Virazel, Alberto Bosio, Patrick Girard, Cyril Chevalier |
| 2016 | DDECS | An effective approach for functional test programs compaction. | Aymen Touati, Alberto Bosio, Patrick Girard, Arnaud Virazel, Paolo Bernardi, Matteo Sonza Reorda |
| 2016 | ETS | A low-cost susceptibility analysis methodology to selectively harden logic circuits. | Imran Wali, Bastien Deveautour, Arnaud Virazel, Alberto Bosio, Patrick Girard, Matteo Sonza Reorda |
| 2015 | DATE | Exploring the impact of functional test programs re-used for power-aware testing. | Aymen Touati, Alberto Bosio, Luigi Dilillo, Patrick Girard, Arnaud Virazel, Paolo Bernardi, Matteo Sonza Reorda |
| 2015 | DDECS | Design-for-Diagnosis Architecture for Power Switches. | Miroslav Valka, Alberto Bosio, Luigi Dilillo, Patrick Girard, Arnaud Virazel, P. Debaud, S. Guilhot |
| 2015 | ETS | An effective hybrid fault-tolerant architecture for pipelined cores. | Imran Wali, Arnaud Virazel, Alberto Bosio, Luigi Dilillo, Patrick Girard |
| 2015 | IOLTS | Design space exploration and optimization of a Hybrid Fault-Tolerant Architecture. | Imran Wali, Arnaud Virazel, Alberto Bosio, Patrick Girard, Matteo Sonza Reorda |
| 2014 | ASPDAC | Power supply noise-aware workload assignments for homogeneous 3D MPSoCs with thermal consideration. | Yuanqing Cheng, Aida Todri-Sanial, Alberto Bosio, Luigi Dilillo, Patrick Girard, Arnaud Virazel |
| 2014 | DDECS | Path delay test in the presence of multi-aggressor crosstalk, power supply noise and ground bounce. | Anu Asokan, Aida Todri-Sanial, Alberto Bosio, Luigi Dilillo, Patrick Girard, Serge Pravossoudovitch, Arnaud Virazel |
| 2014 | DDECS | An intra-cell defect grading tool. | Alberto Bosio, Luigi Dilillo, Patrick Girard, Aida Todri-Sanial, Arnaud Virazel, S. Bernabovi, Paolo Bernardi |
| 2014 | DDECS | Timing-aware ATPG for critical paths with multiple TSVs. | Carolina Metzler, Aida Todri-Sanial, Alberto Bosio, Luigi Dilillo, Patrick Girard, Arnaud Virazel |
| 2014 | DDECS | Test and diagnosis of power switches. | Miroslav Valka, Alberto Bosio, Luigi Dilillo, Aida Todri, Arnaud Virazel, Patrick Girard, P. Debaud, S. Guilhot |
| 2014 | DDECS | Protecting combinational logic in pipelined microprocessor cores against transient and permanent faults. | Imran Wali, Arnaud Virazel, Alberto Bosio, Luigi Dilillo, Patrick Girard, Aida Todri |
| 2014 | ETS | iBoX - Jitter based Power Supply Noise sensor. | Miroslav Valka, Alberto Bosio, Luigi Dilillo, Aida Todri, Arnaud Virazel, Patrick Girard, P. Debaud, S. Guilhot |
| 2014 | VTS | TSV aware timing analysis and diagnosis in paths with multiple TSVs. | Carolina Metzler, Aida Todri-Sanial, Alberto Bosio, Luigi Dilillo, Patrick Girard, Arnaud Virazel |
| 2013 | DATE | Test solution for data retention faults in low-power SRAMs. | Leonardo Bonet Zordan, Alberto Bosio, Luigi Dilillo, Patrick Girard, Aida Todri, Arnaud Virazel, Nabil Badereddine |
| 2013 | ETS | Computing detection probability of delay defects in signal line tsvs. | Carolina Metzler, Aida Todri-Sanial, Alberto Bosio, Luigi Dilillo, Patrick Girard, Arnaud Virazel, Pascal Vivet, Marc Belleville |
| 2013 | ETS | Analyzing resistive-open defects in SRAM core-cell under the effect of process variability. | Elena I. Vatajelu, Alberto Bosio, Luigi Dilillo, Patrick Girard, Aida Todri, Arnaud Virazel, Nabil Badereddine |
| 2013 | IOLTS | SRAM soft error rate evaluation under atmospheric neutron radiation and PVT variations. | Georgios Tsiligiannis, Elena I. Vatajelu, Luigi Dilillo, Alberto Bosio, Patrick Girard, Serge Pravossoudovitch, Aida Todri, Arnaud Virazel, Frederic Wrobel, Frdric Saign |
| 2013 | ITC | On the reuse of read and write assist circuits to improve test efficiency in low-power SRAMs. | Leonardo Bonet Zordan, Alberto Bosio, Luigi Dilillo, Patrick Girard, Aida Todri, Arnaud Virazel, Nabil Badereddine |
| 2013 | VTS | A built-in scheme for testing and repairing voltage regulators of low-power srams. | Leonardo Bonet Zordan, Alberto Bosio, Luigi Dilillo, Patrick Girard, Aida Todri, Arnaud Virazel, Nabil Badereddine |
| 2012 | DATE | Impact of resistive-open defects on the heat current of TAS-MRAM architectures. | Joao Azevedo, Arnaud Virazel, Alberto Bosio, Luigi Dilillo, Patrick Girard, Aida Todri-Sanial, Guillaume Prenat, Jrmy Alvarez-Herault, Ken Mackay |
| 2012 | ETS | Coupling-based resistive-open defects in TAS-MRAM architectures. | Joao Azevedo, Arnaud Virazel, Alberto Bosio, Luigi Dilillo, Patrick Girard, Aida Todri, Guillaume Prenat, Jrmy Alvarez-Herault, Ken Mackay |
| 2012 | ETS | Through-Silicon-Via resistive-open defect analysis. | Carolina Metzler, Aida Todri, Alberto Bosio, Luigi Dilillo, Patrick Girard, Arnaud Virazel |
| 2012 | ETS | Defect analysis in power mode control logic of low-power SRAMs. | Leonardo Bonet Zordan, Alberto Bosio, Luigi Dilillo, Patrick Girard, Aida Todri, Arnaud Virazel, Nabil Badereddine |
| 2012 | IOLTS | Evaluation of test algorithms stress effect on SRAMs under neutron radiation. | Georgios Tsiligiannis, Luigi Dilillo, Alberto Bosio, Patrick Girard, Aida Todri, Arnaud Virazel, Antoine D. Touboul, Frederic Wrobel, Frdric Saign |
| 2012 | ITC | Low-power SRAMs power mode control logic: Failure analysis and test solutions. | Leonardo Bonet Zordan, Alberto Bosio, Luigi Dilillo, Patrick Girard, Aida Todri, Arnaud Virazel, Nabil Badereddine |
| 2012 | VTS | Advanced test methods for SRAMs. | Alberto Bosio, Luigi Dilillo, Patrick Girard, Serge Pravossoudovitch, Arnaud Virazel |
| 2012 | VTS | A pseudo-dynamic comparator for error detection in fault tolerant architectures. | D. A. Tran, Arnaud Virazel, Alberto Bosio, Luigi Dilillo, Patrick Girard, Aida Todri, Michael E. Imhof, Hans-Joachim Wunderlich |
| 2011 | DDECS | On using a SPICE-like TSTAC™ eFlash model for design and test. | Pierre-Didier Mauroux, Arnaud Virazel, Alberto Bosio, Luigi Dilillo, Patrick Girard, Serge Pravossoudovitch, Benot Godard, Gilles Festes, Laurent Vachez |
| 2011 | DDECS | A study of path delay variations in the presence of uncorrelated power and ground supply noise. | Aida Todri, Alberto Bosio, Luigi Dilillo, Patrick Girard, Serge Pravossoudovitch, Arnaud Virazel |
| 2011 | DDECS | Optimized march test flow for detecting memory faults in SRAM devices under bit line coupling. | Leonardo Bonet Zordan, Alberto Bosio, Luigi Dilillo, Patrick Girard, Serge Pravossoudovitch, Arnaud Virazel, Nabil Badereddine |
| 2011 | ETS | A Functional Power Evaluation Flow for Defining Test Power Limits during At-Speed Delay Testing. | Miroslav Valka, Alberto Bosio, Luigi Dilillo, Patrick Girard, Serge Pravossoudovitch, Arnaud Virazel, Ernesto Snchez, Mauricio de Carvalho, Matteo Sonza Reorda |
| 2011 | ITC | On using address scrambling to implement defect tolerance in SRAMs. | Renan Alves Fonseca, Luigi Dilillo, Alberto Bosio, Patrick Girard, Serge Pravossoudovitch, Arnaud Virazel, Nabil Badereddine |
| 2010 | DAC | A statistical simulation method for reliability analysis of SRAM core-cells. | Renan Alves Fonseca, Luigi Dilillo, Alberto Bosio, Patrick Girard, Serge Pravossoudovitch, Arnaud Virazel, Nabil Badereddine |
| 2010 | DDECS | Analysis of power consumption and transition fault coverage for LOS and LOC testing schemes. | Fangmei Wu, Luigi Dilillo, Alberto Bosio, Patrick Girard, Serge Pravossoudovitch, Arnaud Virazel, Junxia Ma, Wei Zhao, Mohammad Tehranipoor, Xiaoqing Wen |
| 2010 | ETS | Analysis of resistive-bridging defects in SRAM core-cells: A comparative study from 90nm down to 40nm technology nodes. | Renan Alves Fonseca, Luigi Dilillo, Alberto Bosio, Patrick Girard, Serge Pravossoudovitch, Arnaud Virazel, Nabil Badereddine |
| 2010 | ETS | Setting test conditions for improving SRAM reliability. | Renan Alves Fonseca, Luigi Dilillo, Alberto Bosio, Patrick Girard, Serge Pravossoudovitch, Arnaud Virazel, Nabil Badereddine |
| 2010 | ETS | A two-layer SPICE model of the ATMEL TSTAC | Pierre-Didier Mauroux, Arnaud Virazel, Alberto Bosio, Luigi Dilillo, Patrick Girard, Serge Pravossoudovitch, Benot Godard, Gilles Festes, Laurent Vachez |
| 2010 | ITC | Parity prediction synthesis for nano-electronic gate designs. | D. A. Tran, Arnaud Virazel, Alberto Bosio, Luigi Dilillo, Patrick Girard, Serge Pravossoudovitch, Hans-Joachim Wunderlich |
| 2010 | ITC | Is test power reduction through X-filling good enough? | Fangmei Wu, Luigi Dilillo, Alberto Bosio, Patrick Girard, Serge Pravossoudovitch, Arnaud Virazel, Mohammad Tehranipoor, Kohei Miyase, Xiaoqing Wen, Nisar Ahmed |
| 2010 | VTS | Detecting NBTI induced failures in SRAM core-cells. | Renan Alves Fonseca, Luigi Dilillo, Alberto Bosio, Patrick Girard, Serge Pravossoudovitch, Arnaud Virazel, Nabil Badereddine |
| 2009 | DATE | A new design-for-test technique for SRAM core-cell stability faults. | Alexandre Ney, Luigi Dilillo, Patrick Girard, Serge Pravossoudovitch, Arnaud Virazel, Magali Bastian, Vincent Gouin |
| 2009 | DDECS | Comprehensive bridging fault diagnosis based on the SLAT paradigm. | Youssef Benabboud, Alberto Bosio, Luigi Dilillo, Patrick Girard, Serge Pravossoudovitch, Arnaud Virazel, Laroussi Bouzaida, Isabelle Izaute |
| 2009 | ITC | NAND flash testing: A preliminary study on actual defects. | Pierre-Didier Mauroux, Arnaud Virazel, Alberto Bosio, Luigi Dilillo, Patrick Girard, Serge Pravossoudovitch, Benot Godard |
| 2008 | DATE | A Design-for-Diagnosis Technique for SRAM Write Drivers. | Alexandre Ney, Patrick Girard, Serge Pravossoudovitch, Arnaud Virazel, Magali Bastian, Vincent Gouin |
| 2008 | IOLTS | Yield Improvement, Fault-Tolerance to the Rescue?. | Julien Vial, Alberto Bosio, Patrick Girard, Christian Landrault, Serge Pravossoudovitch, Arnaud Virazel |
| 2008 | ITC | A History-Based Diagnosis Technique for Static and Dynamic Faults in SRAMs. | Alexandre Ney, Alberto Bosio, Luigi Dilillo, Patrick Girard, Serge Pravossoudovitch, Arnaud Virazel, Magali Bastian |
| 2008 | ITC | SoC Yield Improvement: Redundant Architectures to the Rescue? | Julien Vial, Alberto Bosio, Patrick Girard, Christian Landrault, Serge Pravossoudovitch, Arnaud Virazel |
| 2008 | VTS | An SRAM Design-for-Diagnosis Solution Based on Write Driver Voltage Sensing. | Alexandre Ney, Patrick Girard, Serge Pravossoudovitch, Arnaud Virazel, Magali Bastian, Vincent Gouin |
| 2007 | DATE | Slow write driver faults in 65nm SRAM technology: analysis and March test solution. | Alexandre Ney, Patrick Girard, Christian Landrault, Serge Pravossoudovitch, Arnaud Virazel, Magali Bastian |
| 2007 | DDECS | A Mixed Approach for Unified Logic Diagnosis. | Alexandre Rousset, Alberto Bosio, Patrick Girard, Christian Landrault, Serge Pravossoudovitch, Arnaud Virazel |
| 2007 | ETS | Electrical Simulation Model of the 2T-FLOTOX Core-Cell for Defect Injection and Faulty Behavior Prediction in eFlash Memories. | Olivier Ginez, Jean Michel Daga, Patrick Girard, Christian Landrault, Serge Pravossoudovitch, Arnaud Virazel |
| 2007 | ETS | Dynamic Two-Cell Incorrect Read Fault Due to Resistive-Open Defects in the Sense Amplifiers of SRAMs. | Alexandre Ney, Patrick Girard, Christian Landrault, Serge Pravossoudovitch, Arnaud Virazel, Magali Bastian |
| 2007 | ETS | DERRIC: A Tool for Unified Logic Diagnosis. | Alexandre Rousset, Alberto Bosio, Patrick Girard, Christian Landrault, Serge Pravossoudovitch, Arnaud Virazel |
| 2007 | ITC | A concurrent approach for testing address decoder faults in eFlash memories. | Olivier Ginez, Patrick Girard, Christian Landrault, Serge Pravossoudovitch, Arnaud Virazel, Jean Michel Daga |
| 2007 | VTS | Retention and Reliability Problems in Embedded Flash Memories: Analysis and Test of Defective 2T-FLOTOX Tunnel Window. | Olivier Ginez, Jean Michel Daga, Patrick Girard, Christian Landrault, Serge Pravossoudovitch, Arnaud Virazel |
| 2007 | VTS | Un-Restored Destructive Write Faults Due to Resistive-Open Defects in the Write Driver of SRAMs. | Alexandre Ney, Patrick Girard, Christian Landrault, Serge Pravossoudovitch, Arnaud Virazel, Magali Bastian |
| 2006 | DDECS | March Pre: an Efficient Test for Resistive-Open Defects in the SRAM Pre-charge Circuit. | Luigi Dilillo, Patrick Girard, Serge Pravossoudovitch, Arnaud Virazel, Magali Bastian |
| 2006 | VTS | An Overview of Failure Mechanisms in Embedded Flash Memories. | Olivier Ginez, Jean Michel Daga, Marylene Combe, Patrick Girard, Christian Landrault, Serge Pravossoudovitch, Arnaud Virazel |
| 2005 | DAC | Resistive-open defect injection in SRAM core-cell: analysis and comparison between 0.13 m and 90 nm technologies. | Luigi Dilillo, Patrick Girard, Serge Pravossoudovitch, Arnaud Virazel, Magali Bastian |
| 2005 | ETS | Resistive-open defect influence in SRAM pre-charge circuits: analysis and characterization. | Luigi Dilillo, Patrick Girard, Serge Pravossoudovitch, Arnaud Virazel, Magali Bastian Hage-Hassan |
| 2005 | VTS | Data Retention Fault in SRAM Memories: Analysis and Detection Procedures. | Luigi Dilillo, Patrick Girard, Serge Pravossoudovitch, Arnaud Virazel, Magali Bastian Hage-Hassan |
| 2004 | DATE | Design of Routing-Constrained Low Power Scan Chains. | Yannick Bonhomme, Patrick Girard, Los Guiller, Christian Landrault, Serge Pravossoudovitch, Arnaud Virazel |
| 2004 | ETS | Dynamic read destructive fault in embedded-SRAMs: analysis and march test solution. | Luigi Dilillo, Patrick Girard, Serge Pravossoudovitch, Arnaud Virazel, Simone Borri, Magali Bastian Hage-Hassan |
| 2004 | VTS | March iC-: An Improved Version of March C- for ADOFs Detection. | Luigi Dilillo, Patrick Girard, Serge Pravossoudovitch, Arnaud Virazel, Simone Borri |
| 2003 | ETS | Defect-oriented dynamic fault models for embedded-SRAMs. | Simone Borri, Magali Hage-Hassan, Patrick Girard, Serge Pravossoudovitch, Arnaud Virazel |
| 2002 | VTS | On Using Efficient Test Sequences for BIST. | Ren David, Patrick Girard, Christian Landrault, Serge Pravossoudovitch, Arnaud Virazel |
| 2001 | ETS | On hardware generation of random single input change test sequences. | Ren David, Patrick Girard, Christian Landrault, Serge Pravossoudovitch, Arnaud Virazel |
| 2000 | ETS | Delay fault testing: choosing between random SIC and random MIC test sequences. | Arnaud Virazel, Ren David, Patrick Girard, Christian Landrault, Serge Pravossoudovitch |
| 2000 | IOLTS | Comparison between Random and Pseudo-Random Generation for BIST of Delay, Stuck-at and Bridging Faults. | Patrick Girard, Christian Landrault, Serge Pravossoudovitch, Arnaud Virazel |