| 2022 | IPIN | Beacon Placement and Signal Strength Estimation to Improve Localization Coverage and Accuracy. | Vikas Upadhyay, Kashi Roy, M. Balakrishnan |
| 2021 | FPL | EnergyNN: Energy Estimation for Neural Network Inference Tasks on DPU. | Shikha Goel, M. Balakrishnan, Rijurekha Sen |
| 2019 | DSD | GRanDE: Graphical Representation and Design Space Exploration of Embedded Systems. | Rajesh Kedia, M. Balakrishnan, Kolin Paul |
| 2019 | DSD | Multi-sensor Energy Efficient Obstacle Detection. | Anupam Sobti, M. Balakrishnan, Chetan Arora |
| 2019 | VLSID | Majority Logic: Prime Implicants and n-Input Majority Term Equivalence. | Rajeswari Devadoss, Kolin Paul, M. Balakrishnan |
| 2019 | VLSID | MAVI: Mobility Assistant for Visually Impaired with Optional Use of Local and Cloud Resources. | Rajesh Kedia, Anupam Sobti, Mukund Rungta, Sarvesh Chandoliya, Akhil Soni, Anil Kumar Meena, Chrystle Myrna Lobo, Richa Verma, M. Balakrishnan, Chetan Arora |
| 2018 | WACV | Object Detection in Real-Time Systems: Going Beyond Precision. | Anupam Sobti, Chetan Arora, M. Balakrishnan |
| 2017 | VLSID | MAVI: An Embedded Device to Assist Mobility of Visually Impaired. | Rajesh Kedia, K. K. Yoosuf, Pappireddy Dedeepya, Munib Fazal, Chetan Arora, M. Balakrishnan |
| 2014 | ASPDAC | LightSim: A leakage aware ultrafast temperature simulator. | Smruti R. Sarangi, Gayathri Ananthanarayanan, M. Balakrishnan |
| 2014 | DSD | High Level Design Approach to Accelerate De Novo Genome Assembly Using FPGAs. | B. Sharat Chandra Varma, Kolin Paul, M. Balakrishnan |
| 2014 | FCCM | Mapping Tasks to a Dynamically Reconfigurable Coarse Grained Array. | Mansureh Shahraki Moghaddam, Kolin Paul, M. Balakrishnan |
| 2014 | ICCHP | Edutactile - A Tool for Rapid Generation of Accurate Guideline-Compliant Tactile Graphics for Science and Mathematics. | Mrinal Mech, Kunal Kwatra, Supriya Das, Piyush Chanana, Rohan Paul, M. Balakrishnan |
| 2014 | VLSID | Accelerating Genome Assembly Using Hard Embedded Blocks in FPGAs. | B. Sharat Chandra Varma, Kolin Paul, M. Balakrishnan |
| 2013 | ASSETS | A path-guided audio based indoor navigation system for persons with visual impairment. | Dhruv Jain, Akhil Jain, Rohan Paul, Akhila Komarika, M. Balakrishnan |
| 2013 | FCCM | FAssem: FPGA Based Acceleration of De Novo Genome Assembly. | B. Sharat Chandra Varma, Kolin Paul, M. Balakrishnan, Dominique Lavenier |
| 2013 | VLSID | Accelerating 3D-FFT Using Hard Embedded Blocks in FPGAs. | B. Sharat Chandra Varma, Kolin Paul, M. Balakrishnan |
| 2010 | VLSID | Clocking-Based Coplanar Wire Crossing Scheme for QCA. | Rajeswari Devadoss, Kolin Paul, M. Balakrishnan |
| 2009 | DAC | Online cache state dumping for processor debug. | Anant Vishnoi, Preeti Ranjan Panda, M. Balakrishnan |
| 2009 | DATE | A generic platform for estimation of multi-threaded program performance on heterogeneous multiprocessors. | Aryabartta Sahu, M. Balakrishnan, Preeti Ranjan Panda |
| 2009 | DATE | Cache aware compression for processor debug support. | Anant Vishnoi, Preeti Ranjan Panda, M. Balakrishnan |
| 2009 | ISLPED | An experimental validation of system level design space exploration methodology for energy efficient sensor nodes. | Sonali Chouhan, M. Balakrishnan, Ranjan Bose |
| 2008 | ISLPED | A framework for energy consumption based design space exploration for wireless sensor nodes. | Sonali Chouhan, M. Balakrishnan, Ranjan Bose |
| 2007 | FPL | A Behavioral Synthesis Approach for Distributed Memory FPGA Architectures. | Ashutosh Pal, M. Balakrishnan |
| 2006 | EMSOFT | New approach to architectural synthesis: incorporating QoS constraint. | Harsh Dhand, Basant Kumar Dwivedi, M. Balakrishnan |
| 2006 | VLSID | Sequential Equivalence Checking. | Anmol Mathur, Masahiro Fujita, M. Balakrishnan, Raj S. Mitra |
| 2006 | RSP | Rapid Resource-Constrained Hardware Performance Estimation. | Basant Kumar Dwivedi, Arun Kejariwal, M. Balakrishnan, Anshul Kumar |
| 2005 | DATE | Evaluation of Bus Based Interconnect Mechanisms in Clustered VLIW Architectures. | Anup Gangwar, M. Balakrishnan, Preeti Ranjan Panda, Anshul Kumar |
| 2005 | FPGA | SMPS: an FPGA-based prototyping environment for multiprocessor embedded systems (abstract only). | Ankit Mathur, Mayank Agarwal, Soumyadeb Mitra, Anup Gangwar, M. Balakrishnan, Subhashis Banerjee |
| 2005 | VLSID | ADOPT: An Approach to Activity Based Delay Optimization. | Gaurav Arora, Abhishek Sharma, D. Nagchoudhuri, M. Balakrishnan |
| 2005 | VLSID | Integrated On-Chip Storage Evaluation in ASIP Synthesis. | Manoj Kumar Jain, M. Balakrishnan, Anshul Kumar |
| 2004 | VLSID | Synthesis of Application Specific Multiprocessor Architectures for Process Networks. | Basant Kumar Dwivedi, Anshul Kumar, M. Balakrishnan |
| 2003 | DSD | Exploring Storage Organization in ASIP Synthesis. | Manoj Kumar Jain, M. Balakrishnan, Anshul Kumar |
| 2003 | VLSID | SoC Synthesis with Automatic Hardware Software Interface Generation. | Amarjeet Singh, Amit Chhabra, Anup Gangwar, Basant Kumar Dwivedi, M. Balakrishnan, Anshul Kumar |
| 2002 | CASES | An efficient technique for exploring register file size in ASIP synthesis. | Manoj Kumar Jain, M. Balakrishnan, Anshul Kumar |
| 2002 | VLSID | Exploring the Number of Register Windows in ASIP Synthesis. | Vishal P. Bhatt, M. Balakrishnan, Anshul Kumar |
| 2002 | VLSID | A New Divide and Conquer Method for Achieving High Speed Division in Hardware. | Murali Mohan, Rohini Krishnan, Anshul Kumar, M. Balakrishnan |
| 2001 | VLSID | ASIP Design Methodologies : Survey and Issues. | Manoj Kumar Jain, M. Balakrishnan, Anshul Kumar |
| 2001 | VLSID | Integrating Communication Cost Estimation in Embedded Systems Design : A PCI Case Study. | Anupam Rastogi, M. Balakrishnan, Anshul Kumar |
| 2000 | ISLPED | Speeding up power estimation of embedded software. | Akshaye Sama, J. F. M. Theeuwen, M. Balakrishnan |
| 2000 | VLSID | Processor Evaluation in an Embedded Systems Design Environment. | T. Vinod Kumar Gupta, Purvesh Sharma, M. Balakrishnan, Sharad Malik |
| 2000 | VLSID | nterface Synthesis: Issues and Approaches. | Arvind Rajawat, M. Balakrishnan, Anshul Kumar |
| 2000 | VLSID | Optimal Hardware/Software Partitioning for Concurrent Specification Using Dynamic Programming. | Aviral Shrivastava, Mohit Kumar, Sanjiv Kapoor, Shashi Kumar, M. Balakrishnan |
| 1999 | FPGA | Hardware/Software Partitioning Between Microprocessor and Reconfigurable Hardware. | M. Anand, Sanjiv Kapoor, M. Balakrishnan |
| 1999 | VLSID | MPEG-2 Video Data Simulator: A Case Study in Constrained HW-SW Codesign. | Rashmi Goswami, V. Srinivasan, M. Balakrishnan |
| 1999 | VLSID | Simulation and Modeling of a Multicast ATM Switch. | Ajoy C. Siddabathuni, M. Balakrishnan |
| 1998 | VLSID | Speeding Up Program Execution Using Reconfigurable Hardware and a Hardware Function Library. | Sitanshu Jain, M. Balakrishnan, Anshul Kumar, Shashi Kumar |
| 1998 | VLSID | Real Time Collision Detection and Avoidance: A Case Study for Design Space Exploration in HW-SW Codesign. | Sandeep K. Lodha, Shashank Gupta, M. Balakrishnan, Subhashis Banerjee |
| 1997 | VLSID | A Novel Reconfigurable Co-Processor Architecture. | Gaurav Aggarwal, Nitin Thaper, Kamal Aggarwal, M. Balakrishnan, Shashi Kumar |
| 1997 | VLSID | Allocation of FIFO Structures in RTL Data Paths. | Heman Khanna, M. Balakrishnan |
| 1997 | VLSID | Optimal Clock Period for Synthesized Data Paths. | A. R. Naseer, M. Balakrishnan, Anshul Kumar |
| 1995 | FPL | Delay Minimal Mapping of RTL Structures onto LUT Based FPGAs. | A. R. Naseer, M. Balakrishnan, Anshul Kumar |
| 1995 | ICIP | Buffer constraints in a variable-rate packetized video system. | M. Balakrishnan |
| 1995 | VLSID | Heuristic search based approach to scheduling, allocation and binding in Data Path Synthesis. | Alok Kumar, Anshul Kumar, M. Balakrishnan |
| 1994 | FPL | An Efficient Technique for Mapping RTL Structures onto FPGAs. | A. R. Naseer, M. Balakrishnan, Anshul Kumar |
| 1994 | VLSID | FAST: FPGA Targeted RTL Structure Synthesis Technique. | A. R. Naseer, M. Balakrishnan, Anshul Kumar |
| 1993 | VLSID | High Level Design Experiences with IDEAS. | C. S. Ajay, M. Balakrishnan, D. Harikrishna, M. Karunakaran, Anshul Kumar, Shashi Kumar, V. Mudgil, A. R. Naseer |
| 1993 | VLSID | DESSERT: Design Space Exploration of RT Level Components. | M. V. Rao, M. Balakrishnan, Anshul Kumar |
| 1992 | VLSID | Data Path Synthesis With Global Time Constraint. | Prashant P. Nedungadi, M. Balakrishnan, Anshul Kumar |
| 1989 | DAC | Integrated Scheduling and Binding: A Synthesis Approach for Design Space Exploration. | M. Balakrishnan, Peter Marwedel |
| 1986 | MICRO | An efficient retargetable microcode generator. | M. Balakrishnan, P. C. P. Bhatt, B. B. Madan |
| 1982 | ICASSP | A multi-channel microprogrammed FFT processor. | M. Balakrishnan, A. V. S. M. Rao, Rajendar Bahl |