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Sharad C. Seth

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

42

Venues

17

Active years

1981–2018

Best venue rank

A*

Where they publish

Papers

42 indexed papers, newest first.

YearVenueTitleAuthors
2018ICPPLeverage Redundancy in Hardware Transactional Memory to Improve Cache Reliability.Zhichao Yan, Hong Jiang, Witawas Srisa-an, Sharad C. Seth, Yujuan Tan
2017CCGRIDEnergy-efficient I/O Thread Schedulers for NVMe SSDs on NUMA.Junjie Qian, Hong Jiang, Witawas Srisa-an, Sharad C. Seth, Stan Skelton, Joseph Moore
2016ICPRTable headers: An entrance to the data mine.George Nagy, Sharad C. Seth
2016VEEExploiting FIFO Scheduler to Improve Parallel Garbage Collection Performance.Junjie Qian, Witawas Srisa-an, Sharad C. Seth, Hong Jiang, Du Li, Pan Yi
2015ISPASSFactors affecting scalability of multithreaded Java applications on manycore systems.Junjie Qian, Du Li, Witawas Srisa-an, Hong Jiang, Sharad C. Seth
2014DASEnd-to-End Conversion of HTML Tables for Populating a Relational Database.George Nagy, Sharad C. Seth, David W. Embley
2014ICPRTransforming Web Tables to a Relational Database.David W. Embley, Sharad C. Seth, George Nagy
2013ICDARSegmenting Tables via Indexing of Value Cells by Table Headers.Sharad C. Seth, George Nagy
2012ICSLocality & utility co-optimization for practical capacity management of shared last level caches.Dongyuan Zhan, Hong Jiang, Sharad C. Seth
2011ICDARData Extraction from Web Tables: The Devil is in the Details.George Nagy, Sharad C. Seth, Dongpu Jin, David W. Embley, Spencer Machado, Mukkai S. Krishnamoorthy
2010DASAnalysis and taxonomy of column header categories for web tables.Sharad C. Seth, Ramana Chakradhar Jandhyala, Mukkai S. Krishnamoorthy, George Nagy
2010ISCASHardware implementation of the double-tree scan architecture.Nathan Schemm, Sina Balkir, Sharad C. Seth
2010MICROSTEM: Spatiotemporal Management of Capacity for Intra-core Last Level Caches.Dongyuan Zhan, Hong Jiang, Sharad C. Seth
2010VLSIDA Unified Solution to Scan Test Volume, Time, and Power Minimization.Zhen Chen, Sharad C. Seth, Dong Xiang, Bhargab B. Bhattacharya
2010VTSA novel hybrid delay testing scheme with low test power, volume, and time.Zhen Chen, Sharad C. Seth, Dong Xiang
2007VTSEfficient RTL Coverage Metric for Functional Test Selection.Jian Kang, Sharad C. Seth, Vijay Gangaram
2006ICPRA Maximum-Likelihood Approach to Symbolic Indirect Correlation.Ashutosh Joshi, George Nagy, Daniel P. Lopresti, Sharad C. Seth
2005VLSIDOn Finding Consecutive Test Vectors in a Random Sequence for Energy-Aware BIST Design.Sheng Zhang, Sharad C. Seth, Bhargab B. Bhattacharya
2003CVPRIndirect Symbolic Correlation Approach to Unsegmented Text Recognition.George Nagy, Sharad C. Seth, Shashank K. Mehta, Yu Lin
2003ITCDouble-Tree Scan: A Novel Low-Power Scan-Path Architecture.Bhargab B. Bhattacharya, Sharad C. Seth, Sheng Zhang
2003VLSIDLow-Energy BIST Design for Scan-based Logic Circuits.Bhargab B. Bhattacharya, Sharad C. Seth, Sheng Zhang
2002VLSIDA Novel Method to Improve the Test Efficiency of VLSI Tests.Hailong Cui, Sharad C. Seth, Shashank K. Mehta
2001ICDARAdaptive Segmentation of Document Images.Don Sylwester, Sharad C. Seth
2001VLSIDDesign Verification and Functional Testing of FiniteState Machines.Mark W. Weiss, Sharad C. Seth, Shashank K. Mehta, Kent L. Einspahr
2000ITCExploiting don't cares to enhance functional tests.Mark W. Weiss, Sharad C. Seth, Shashank K. Mehta, Kent L. Einspahr
1999ICDARCooperative Text and Line-Art Extraction from a Topographic Map.Luyang Li, George Nagy, Ashok Samal, Sharad C. Seth, Yihong Xu
1999VLSIDEmpirical Computation of Reject Ratio in VLSI Testing.Shashank K. Mehta, Sharad C. Seth
1997VLSIDSynthesis for Testability by Two-Clock Control.Shashank K. Mehta, Kent L. Einspahr, Sharad C. Seth
1995FPGAHGA: A Hardware-Based Genetic Algorithm.Stephen D. Scott, Ashok Samal, Sharad C. Seth
1995ICDARA trainable, single-pass algorithm for column segmentation.Don Sylwester, Sharad C. Seth
1995ICDARA system for recognizing a large class of engineering drawings.Yuhong Yu, Ashok Samal, Sharad C. Seth
1995VLSIDParallel test generation with low communication overhead.Sivaramakrishnan Venkatraman, Sharad C. Seth, Prathima Agrawal
1994VLSIDLogic Simulation Using an Asynchronous Parallel Discrete-Event Simulation Model on a SIMD Machine.Sharad C. Seth, Lee Gowen, Matt Payne, Don Sylwester
1992VLSIDA New Method for Generating Tests for Delay Faults in Non-Scan Circuits.Prathima Agrawal, Vishwani D. Agrawal, Sharad C. Seth
1992VLSIDA Switch-Level Test Generation System.Kent L. Einspahr, Sharad C. Seth
1991ITCEstimating the Quality of Manufactured Digital Sequential Circuits.Dharam Vir Das, Sharad C. Seth, Vishwani D. Agrawal
1990ITCAn experimental study on reject ratio prediction for VLSI circuits: Kokomo revisited.Dharam Vir Das, Sharad C. Seth, Paul T. Wagner, John C. Anderson, Vishwani D. Agrawal
1990MICROHigh-level microprogramming: an optimizing C compiler for a processing element of a CAD accelerator.Paul Kenyon, Prathima Agrawal, Sharad C. Seth
1989ITCTestability Analysis of Synchronous Sequential Circuits Based on Structural Data.Raghu V. Hudli, Sharad C. Seth
1988ICCADA fast fault simulation algorithm for combinational circuits.Wuudiann Ke, Sharad C. Seth, Bhargab B. Bhattacharya
1985ITCPredicting Fault Coverage from Probabilistic Testability.Sharad C. Seth
1981DACLSI product quality and fault coverage.Vishwani D. Agrawal, Sharad C. Seth, Prathima Agrawal