Ulf Schlichtmann
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
198
Venues
23
Active years
1992–2026
Best venue rank
A*
Where they publish
- ADATE60 papers
- AICCAD39 papers
- A*DAC34 papers
- BASPDAC24 papers
- BETS6 papers
- CISCAS5 papers
- CDSD5 papers
- CIOLTS4 papers
- A*CVPR3 papers
- CFDL3 papers
- AITC3 papers
- A*AAAI1 paper
- AICS1 paper
- BIJCNN1 paper
- BECRTS1 paper
- ARTAS1 paper
- NationalVLSID1 paper
- CRSP1 paper
- CSCOPES1 paper
- BRTCSA1 paper
- CWISTP1 paper
- CICCD1 paper
- BGI1 paper
Papers
198 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2026 | AAAI | PrefixGPT: Prefix Adder Optimization by a Generative Pre-trained Transformer. | Ruogu Ding, Xin Ning, Ulf Schlichtmann, Weikang Qian |
| 2026 | ASPDAC | Quantifying Compiler-induced Reliability Loss in Software-Implemented Hardware Fault Tolerance. | Davide Baroffio, Johannes Geier, Federico Reghenzani, Ulf Schlichtmann, William Fornaciari |
| 2026 | ASPDAC | Built-In Self-Test for Locating Leakage Defects on Continuous-Flow Microfluidic Chips. | Jiahui Peng, Mengchu Li, Tsun-Ming Tseng, Ulf Schlichtmann |
| 2026 | ASPDAC | Accessible Ratio-Specific Mixing: Single-Pressure-Driven Multi-Reagent Mixer Design and Synthesis for 3D-Printed Microfluidics. | Yushen Zhang, Debraj Kundu, Tsun-Ming Tseng, Sudip Roy, Shigeru Yamashita, Ulf Schlichtmann |
| 2026 | DATE | Multi-Partner Project: Advancing European Semiconductor and Chiplet Innovation Through the Bavarian Chip Design Center. | Hussam Amrouch, Jehaan Joseph, Michael Schirmer, Johannes Geier, Ulf Schlichtmann, Michael Meidinger, Thomas Wild, Andreas Herkersdorf, Jens Npel, Georg Sigl, Yicheng Zhang, Carsten Trinitis, Aswathy Nedumpalli Sankaranarayanan, Martin Schulz, Andreas Korb, Konrad Hohentanner |
| 2026 | DATE | Multi-Partner Project: A Holistic and Open-Source Approach to Efficient, Secure and Reliable AI Hardware Deployment in DI-EDAI. | Georgios Sotiropoulos, Felix Frombach, Julian Hfer, Tanja Harbaum, Jrgen Becker, Henrik Iver Thore, Vincent Meyers, Mehdi B. Tahoori, Zeynep Demirdag, Mohammed Bakr Sikal, Hassan Nassar, Heba Khdr, Jrg Henkel, Christopher Wolters, Philipp van Kempen, Johannes Geier, Ulf Schlichtmann, Batuhan Sesli, Muhammad Sabih, Jakob Wittmann, Frank Hannig, Jrgen Teich, Lukas Steiner, Norbert Wehn, Mohamed Shelkamy Ali, Philipp Schmitz, Wolfgang Kunz, Stefan Koegler, Georg Sigl |
| 2026 | ICS | G-PathGen: An Efficient GPU-Parallel k-Critical Path Generation Algorithm. | Che Chang, Yi-Hua Chung, Cheng-Hsiang Chiu, Wan-Luan Lee, Boyang Zhang, Ulf Schlichtmann, Ing-Chao Lin, Xiangyao Yu, Tsung-Wei Huang |
| 2025 | ASPDAC | Dynamic Topology-Aware Flow Path Construction and Scheduling Optimization for Multilayered Continuous-Flow Microfluidic Biochips. | Meng Lian, Shucheng Yang, Mengchu Li, Tsun-Ming Tseng, Ulf Schlichtmann |
| 2025 | ASPDAC | CPONoC: Critical Path-aware Physical Implementation for Optical Networks-on-Chip. | Yan-Ting Chen, Zhidan Zheng, Shao-Yun Fang, Tsun-Ming Tseng, Ulf Schlichtmann |
| 2025 | ASPDAC | An Efficient General-Purpose Optical Accelerator for Neural Networks. | Sijie Fei, Amro Eldebiky, Grace Li Zhang, Bing Li, Ulf Schlichtmann |
| 2025 | ASPDAC | HyperG: Multilevel GPU-Accelerated k-way Hypergraph Partitioner. | Wan-Luan Lee, Dian-Lun Lin, Cheng-Hsiang Chiu, Ulf Schlichtmann, Tsung-Wei Huang |
| 2025 | ASPDAC | 3M-DeSyn: Design Synthesis for Multi-Layer 3D-Printed Microfluidics with Timing and Volumetric Control. | Yushen Zhang, Dragan Raseta, Tsun-Ming Tseng, Ulf Schlichtmann |
| 2025 | ASPDAC | A Backup Resource Customization and Allocation Method for Wavelength-Routed Optical Networks-on-Chip Topologies. | Zhidan Zheng, You-Jen Chang, Liaoyuan Cheng, Tsun-Ming Tseng, Ulf Schlichtmann |
| 2025 | CVPR | RepFC: Universal Structural Reparametrization Block for High Performance, Lightweight Deep Neural Networks. | Shambhavi Balamuthu Sampath, Judeson Anthony Fernando, Moritz Thoma, Nael Fasfous, Lukas Frickenstein, Pierpaolo Mor, Manoj Rohit Vemparala, Alexander Frickenstein, Ulf Schlichtmann, Walter Stechele |
| 2025 | CVPR | Uncertainty Aware Training to Improve Uncertainty Active Learning for Semantic Segmentation. | Moritz Thoma, Tobias Preintner, Emad Aghajanzadeh, Shambhavi Balamuthu Sampath, Pierpaolo Mor, Nael Fasfous, Manoj Rohit Vemparala, Alexander Frickenstein, Daniel Mueller-Gritschneder, Ulf Schlichtmann |
| 2025 | CVPR | FLAR-SVD: Fast and Latency-Aware Singular Value Decomposition for Model Compression. | Moritz Thoma, Jorge Villasante, Emad Aghajanzadeh, Shambhavi Balamuthu Sampath, Pierpaolo Mor, Maximilian Groetzinger, Daniil Dylkin, Manoj Rohit Vemparala, Nael Fasfous, Alexander Frickenstein, Daniel Mueller-Gritschneder, Ulf Schlichtmann |
| 2025 | DAC | Process-Variation-Aware Design Optimization for Wavelength-Routed Optical Networks-on-Chip. | Liaoyuan Cheng, Mengchu Li, Tsun-Ming Tseng, Martin Schottenloher, Ulf Schlichtmann |
| 2025 | DAC | iG-kway: Incremental k-way Graph Partitioning on GPU. | Wan-Luan Lee, Shui Jiang, Dian-Lun Lin, Che Chang, Boyang Zhang, Yi-Hua Chung, Ulf Schlichtmann, Tsung-Yi Ho, Tsung-Wei Huang |
| 2025 | DAC | AutoRE: Bayesian-Optimization-based Automatic Reliability Enhancement Tool for Flow-based Microfluidic Biochips. | Siyuan Liang, Yushen Zhang, Mengchu Li, Tsun-Ming Tseng, Ulf Schlichtmann, Tsung-Yi Ho |
| 2025 | DAC | FT-MUX: A Fault-Tolerant Microfluidic Multiplexer Design. | Mengchu Li, Jiahui Peng, Tsun-Ming Tseng, Ulf Schlichtmann |
| 2025 | DAC | LA-MTL: Latency-Aware Automated Multi-Task Learning. | Shambhavi Balamuthu Sampath, Sami Sawani, Moritz Thoma, Lukas Frickenstein, Pierpaolo Mor, Nael Fasfous, Manoj Rohit Vemparala, Alexander Frickenstein, Ulf Schlichtmann, Claudio Passerone, Walter Stechele |
| 2025 | DAC | SuperFast: Fast Supernet Training Using Initial Knowledge. | Moritz Thoma, Emad Aghajanzadeh, Shambhavi Balamuthu Sampath, Pierpaolo Mor, Nael Fasfous, Alexander Frickenstein, Manoj Rohit Vemparala, Daniel Mueller-Gritschneder, Ulf Schlichtmann |
| 2025 | DATE | Rapid Fault Injection Simulation by Hash-Based Differential Fault Effect Equivalence Checks. | Johannes Geier, Leonidas Kontopoulos, Daniel Mueller-Gritschneder, Ulf Schlichtmann |
| 2025 | DATE | Multi-Partner Project: Advancing the EDA Tools Landscape for the European RISC-V Ecosystem in TRISTAN. | Fatma Jebali, Caaliph Andriamisaina, Mathieu Jan, Wolfgang Ecker, Florian Egert, Bernhard Fischer, Alessio Burrello, Daniele Jahier Pagliari, Sara Vinco, Giuseppe Tagliavini, Ingo Feldner, Andreas Mauderer, Axel Sauer, Arnr Kristmundsson, Alexander Schober, To Bernier, Matti Kyr, Ulf Schlichtmann, Rocco Jonack |
| 2025 | DATE | Loading-Aware Mixing-Efficient Sample Preparation on Programmable Microfluidic Device. | Debraj Kundu, Tsun-Ming Tseng, Shigeru Yamashita, Ulf Schlichtmann |
| 2025 | DATE | CorrectBench: Automatic Testbench Generation with Functional Self-Correction using LLMs for HDL Design. | Ruidi Qiu, Grace Li Zhang, Rolf Drechsler, Ulf Schlichtmann, Bing Li |
| 2025 | DATE | Multi-Partner Project: Open-Source Design Tools for Co-Development of AI Algorithms and AI Chips: (Initial Stage). | Mehdi B. Tahoori, Jrgen Becker, Jrg Henkel, Wolfgang Kunz, Ulf Schlichtmann, Georg Sigl, Jrgen Teich, Norbert Wehn |
| 2025 | DATE | SRing: A Sub-Ring Construction Method for Application-Specific Wavelength-Routed Optical NoCs. | Zhidan Zheng, Meng Lian, Mengchu Li, Tsun-Ming Tseng, Ulf Schlichtmann |
| 2025 | ETS | Large Language Models (LLMs) for Verification, Testing, and Design. | Chandan Kumar Jha, Muhammad Hassan, Khushboo Qayyum, Sallar Ahmadi-Pour, Kangwei Xu, Ruidi Qiu, Jason Blocklove, Luca Collini, Andre Nakkab, Ulf Schlichtmann, Grace Li Zhang, Ramesh Karri, Bing Li, Siddharth Garg, Rolf Drechsler |
| 2025 | ICCAD | WROXIM: A Network-Level Simulation Platform for Wavelength-Routed Optical Networks-on-Chip. | Jeng-De Chang, Zhidan Zheng, Liaoyuan Cheng, Liu-Xuan-Wei Zhang, Tsun-Ming Tseng, Ing-Chao Lin, Ulf Schlichtmann |
| 2025 | ICCAD | FAB: Fast and Demand-Aware Bandwidth Allocation Method for Wavelength-Routed Optical Networks-on-Chip. | Liaoyuan Cheng, Mengchu Li, Zhidan Zheng, Tsun-Ming Tseng, Ulf Schlichtmann |
| 2025 | ICCAD | HLSTester: Efficient Testing of Behavioral Discrepancies with LLMs for High-Level Synthesis. | Kangwei Xu, Bing Li, Grace Li Zhang, Ulf Schlichtmann |
| 2025 | IJCNN | Automated Graph-level Passes for TinyML Fault Tolerance. | Johannes Kappes, Johannes Geier, Phillipp van Kempen, Daniel Mueller-Gritschneder, Ulf Schlichtmann |
| 2025 | ISCAS | Enabling Machine Learning for Power Modeling via Artificial Netlist Generation. | Philipp Fengler, Junpeng Chen, Sani R. Nassif, Ulf Schlichtmann |
| 2024 | ASPDAC | Logic Design of Neural Networks for High-Throughput and Low-Power Applications. | Kangwei Xu, Grace Li Zhang, Ulf Schlichtmann, Bing Li |
| 2024 | DAC | LaMUX: Optimized Logic-Gate-Enabled High-Performance Microfluidic Multiplexer Design. | Siyuan Liang, Yushen Zhang, Rana Altay, Hudson Gasvoda, Mengchu Li, Ismail Emre Araci, Tsun-Ming Tseng, Ulf Schlichtmann, Tsung-Yi Ho |
| 2024 | DAC | Late Breaking Results: Efficient Built-in Self-Test for Microfluidic Large-Scale Integration (mLSI). | Mengchu Li, Hanchen Gu, Yushen Zhang, Siyuan Liang, Hudson Gasvoda, Rana Altay, Ismail Emre Araci, Tsun-Ming Tseng, Tsung-Yi Ho, Ulf Schlichtmann |
| 2024 | DAC | Multi-Resonance Mesh-Based Wavelength-Routed Optical Networks-on-Chip. | Zhidan Zheng, Liaoyuan Cheng, Kanta Arisawa, Qingyu Li, Alexandre Truppel, Shigeru Yamashita, Tsun-Ming Tseng, Ulf Schlichtmann |
| 2024 | DATE | Computational and Storage Efficient Quadratic Neurons for Deep Neural Networks. | Chuangtao Chen, Grace Li Zhang, Xunzhao Yin, Cheng Zhuo, Ulf Schlichtmann, Bing Li |
| 2024 | DATE | A FeFET-based Time-Domain Associative Memory for Multi-bit Similarity Computation. | Qingrong Huang, Hamza Errahmouni Barkam, Zeyu Yang, Jianyi Yang, Thomas Kmpfe, Kai Ni, Grace Li Zhang, Bing Li, Ulf Schlichtmann, Mohsen Imani, Cheng Zhuo, Xunzhao Yin |
| 2024 | DATE | PathDriver-Wash: A Path-Driven Wash Optimization Method for Continuous-Flow Lab-on-a-Chip Systems. | Xing Huang, Jiaxuan Wang, Zhiwen Yu, Bin Guo, Tsung-Yi Ho, Ulf Schlichtmann, Krishnendu Chakrabarty |
| 2024 | DATE | ScanCamouflage: Obfuscating Scan Chains with Camouflaged Sequential and Logic Gates. | Tarik Ibrahimpasic, Grace Li Zhang, Michaela Brunner, Georg Sigl, Bing Li, Ulf Schlichtmann |
| 2024 | DATE | OplixNet: Towards Area-Efficient Optical Split-Complex Networks with Real-to-Complex Data Assignment and Knowledge Distillation. | Ruidi Qiu, Amro Eldebiky, Grace Li Zhang, Xunzhao Yin, Cheng Zhuo, Ulf Schlichtmann, Bing Li |
| 2024 | DSD | Seal5: Semi-Automated LLVM Support for RISC-V ISA Extensions Including Autovectorization. | Philipp van Kempen, Mathis Salmen, Daniel Mueller-Gritschneder, Ulf Schlichtmann |
| 2024 | ICCAD | Minimizing Worst-Case Data Transmission Cycles in Wavelength-Routed Optical NoC through Bandwidth Allocation. | Liaoyuan Cheng, Mengchu Li, Tsun-Ming Tseng, Ulf Schlichtmann |
| 2024 | ICCAD | BasisN: Reprogramming-Free RRAM-Based In-Memory-Computing by Basis Combination for Deep Neural Networks. | Amro Eldebiky, Grace Li Zhang, Xunzhao Yin, Cheng Zhuo, Ing-Chao Lin, Ulf Schlichtmann, Bing Li |
| 2024 | ICCAD | RABER: Reliability-Aware Bayesian-Optimization-based Control Layer Escape Routing for Flow-based Microfluidics. | Siyuan Liang, Rongliang Fu, Mengchu Li, Tsun-Ming Tseng, Ulf Schlichtmann, Tsung-Yi Ho |
| 2023 | ASPDAC | CompaSeC: A Compiler-Assisted Security Countermeasure to Address Instruction Skip Fault Attacks on RISC-V. | Johannes Geier, Lukas Auer, Daniel Mueller-Gritschneder, Uzair Sharif, Ulf Schlichtmann |
| 2023 | DAC | PowerPruning: Selecting Weights and Activations for Power-Efficient Neural Network Acceleration. | Richard Petri, Grace Li Zhang, Yiran Chen, Ulf Schlichtmann, Bing Li |
| 2023 | DATE | CorrectNet: Robustness Enhancement of Analog In-Memory Computing for Neural Networks by Error Suppression and Compensation. | Amro Eldebiky, Grace Li Zhang, Georg Bcherer, Bing Li, Ulf Schlichtmann |
| 2023 | DATE | VE-FIDES: Designing Trustworthy Supply Chains Using Innovative Fingerprinting Implementations. | Bernhard Lippmann, Joel Hatsch, Stefan Seidl, Detlef Houdeau, Niranjana Papagudi Subrahmanyam, Daniel Schneider, Malek Safieh, Anne Passarelli, Aliza Maftun, Michaela Brunner, Tim Music, Michael Pehl, Tauseef Siddiqui, Ralf Brederlow, Ulf Schlichtmann, Bjoern Driemeyer, Maurits Ortmanns, Robert Hesselbarth, Matthias Hiller |
| 2023 | DATE | Extended Abstract: Monitoring-based Thermal Management for Mixed-Criticality Systems. | Marcel Mettler, Martin Rapp, Heba Khdr, Daniel Mueller-Gritschneder, Jrg Henkel, Ulf Schlichtmann |
| 2023 | DATE | Efficient Software-Implemented HW Fault Tolerance for TinyML Inference in Safety-critical Applications. | Uzair Sharif, Daniel Mueller-Gritschneder, Rafael Stahl, Ulf Schlichtmann |
| 2023 | DATE | Class-based Quantization for Neural Networks. | Wenhao Sun, Grace Li Zhang, Huaxi Gu, Bing Li, Ulf Schlichtmann |
| 2023 | DATE | SteppingNet: A Stepping Neural Network with Incremental Accuracy Enhancement. | Wenhao Sun, Grace Li Zhang, Xunzhao Yin, Cheng Zhuo, Huaxi Gu, Bing Li, Ulf Schlichtmann |
| 2023 | DATE | XRing: A Crosstalk-Aware Synthesis Method for Wavelength-Routed Optical Ring Routers. | Zhidan Zheng, Mengchu Li, Tsun-Ming Tseng, Ulf Schlichtmann |
| 2023 | ECRTS | Memory Latency Distribution-Driven Regulation for Temporal Isolation in MPSoCs. | Ahsan Saeed, Denis Hoornaert, Dakshina Dasari, Dirk Ziegenbein, Daniel Mueller-Gritschneder, Ulf Schlichtmann, Andreas Gerstlauer, Renato Mancuso |
| 2023 | ETS | Semi-Supervised Deep Learning for Microcontroller Performance Screening. | Nicol Bellarmino, Riccardo Cantoro, Martin Huch, Tobias Kilian, Ulf Schlichtmann, Giovanni Squillero |
| 2023 | ICCAD | A Novel and Efficient Block-Based Programming for ReRAM-Based Neuromorphic Computing. | Wei-Lun Chen, Fang-Yi Gu, Ing-Chao Lin, Grace Li Zhang, Bing Li, Ulf Schlichtmann |
| 2023 | ICCAD | NeuroEscape: Ordered Escape Routing via Monte-Carlo Tree Search and Neural Network. | Zhiyang Chen, Tsung-Yi Ho, Ulf Schlichtmann, Datao Chen, Mingyu Liu, Hailong Yao, Xia Yin |
| 2023 | ICCAD | ARMM: Adaptive Reliability Quantification Model of Microfluidic Designs and its Graph-Transformer-Based Implementation. | Siyuan Liang, Meng Lian, Mengchu Li, Tsun-Ming Tseng, Ulf Schlichtmann, Tsung-Yi Ho |
| 2022 | ASPDAC | Differentially Evolving Memory Ensembles: Pareto Optimization based on Computational Intelligence for Embedded Memories on a System Level. | Felix Last, Ceren Yeni, Ulf Schlichtmann |
| 2022 | DAC | Energy efficient data search design and optimization based on a compact ferroelectric FET content addressable memory. | Jiahao Cai, Mohsen Imani, Kai Ni, Grace Li Zhang, Bing Li, Ulf Schlichtmann, Cheng Zhuo, Xunzhao Yin |
| 2022 | DAC | GNN-based concentration prediction for random microfluidic mixers. | Weiqing Ji, Xingzhuo Guo, Shouan Pan, Tsung-Yi Ho, Ulf Schlichtmann, Hailong Yao |
| 2022 | DATE | Contamination-Free Switch Design and Synthesis for Microfluidic Large-Scale Integration. | Duan Shen, Yushen Zhang, Mengchu Li, Tsun-Ming Tseng, Ulf Schlichtmann |
| 2022 | DSD | RRAM-based Neuromorphic Computing: Data Representation, Architecture, Logic, and Programming. | Grace Li Zhang, Shuhang Zhang, Hai Helen Li, Ulf Schlichtmann |
| 2022 | ETS | Test, Reliability and Functional Safety Trends for Automotive System-on-Chip. | Francesco Angione, Davide Appello, Joseph Aribido, Jyotika Athavale, Nicol Bellarmino, Paolo Bernardi, Riccardo Cantoro, Corrado De Sio, Tommaso Foscale, Gabriele Gavarini, Juan-David Guerrero-Balaguera, Martin Huch, Giusy Iaria, Tobias Kilian, Riccardo Mariani, Raffaele Martone, Annachiara Ruospo, Ernesto Snchez, Ulf Schlichtmann, Giovanni Squillero, Matteo Sonza Reorda, Luca Sterpone, Vincenzo Tancorre, Roberto Ugioli |
| 2022 | ETS | Reducing Routing Overhead by Self-Enabling Functional Path Ring Oscillators. | Tobias Kilian, Markus Hanel, Daniel Tille, Martin Huch, Ulf Schlichtmann |
| 2022 | FDL | CorePerfDSL: A Flexible Processor Description Language for Software Performance Simulation. | Conrad Foik, Daniel Mueller-Gritschneder, Ulf Schlichtmann |
| 2022 | ICCAD | CoMUX: Combinatorial-Coding-Based High-Performance Microfluidic Control Multiplexer Design. | Siyuan Liang, Mengchu Li, Tsun-Ming Tseng, Ulf Schlichtmann, Tsung-Yi Ho |
| 2022 | IOLTS | Microcontroller Performance Screening: Optimizing the Characterization in the Presence of Anomalous and Noisy Data. | Nicol Bellarmino, Riccardo Cantoro, Martin Huch, Tobias Kilian, Ulf Schlichtmann, Giovanni Squillero |
| 2022 | ISCAS | Aging Aware Retraining for Memristor-based Neuromorphic Computing. | Wenwen Ye, Grace Li Zhang, Bing Li, Ulf Schlichtmann, Cheng Zhuo, Xunzhao Yin |
| 2022 | ITC | A Path Selection Flow for Functional Path Ring Oscillators using Physical Design Data. | Tobias Kilian, Markus Hanel, Daniel Tille, Martin Huch, Ulf Schlichtmann |
| 2022 | RTAS | Memory Utilization-Based Dynamic Bandwidth Regulation for Temporal Isolation in Multi-Cores. | Ahsan Saeed, Dakshina Dasari, Dirk Ziegenbein, Varun Rajasekaran, Falk Rehm, Michael Pressler, Arne Hamann, Daniel Mueller-Gritschneder, Andreas Gerstlauer, Ulf Schlichtmann |
| 2021 | ASPDAC | Connection-based Processing-In-Memory Engine Design Based on Resistive Crossbars. | Shuhang Zhang, Hai Helen Li, Ulf Schlichtmann |
| 2021 | ASPDAC | Robustness of Neuromorphic Computing with RRAM-based Crossbars and Optical Neural Networks. | Grace Li Zhang, Bing Li, Ying Zhu, Tianchen Wang, Yiyu Shi, Xunzhao Yin, Cheng Zhuo, Huaxi Gu, Tsung-Yi Ho, Ulf Schlichtmann |
| 2021 | ASPDAC | Light: A Scalable and Efficient Wavelength-Routed Optical Networks-On-Chip Topology. | Zhidan Zheng, Mengchu Li, Tsun-Ming Tseng, Ulf Schlichtmann |
| 2021 | DAC | Bayesian Inference Based Robust Computing on Memristor Crossbar. | Di Gao, Qingrong Huang, Grace Li Zhang, Xunzhao Yin, Bing Li, Ulf Schlichtmann, Cheng Zhuo |
| 2021 | DATE | FAST: A Fast Automatic Sweeping Topology Customization Method for Application-Specific Wavelength-Routed Optical NoCs. | Xiao Moyuan, Tsun-Ming Tseng, Ulf Schlichtmann |
| 2021 | DATE | Energy-Aware Designs of Ferroelectric Ternary Content Addressable Memory. | Yu Qian, Zhenhao Fan, Haoran Wang, Chao Li, Mohsen Imani, Kai Ni, Grace Li Zhang, Bing Li, Ulf Schlichtmann, Cheng Zhuo, Xunzhao Yin |
| 2021 | DATE | Hardware-Software Codesign of Weight Reshaping and Systolic Array Multiplexing for Efficient CNNs. | Jingyao Zhang, Huaxi Gu, Grace Li Zhang, Bing Li, Ulf Schlichtmann |
| 2021 | DATE | An Efficient Programming Framework for Memristor-based Neuromorphic Computing. | Grace Li Zhang, Bing Li, Xing Huang, Chen Shen, Shuhang Zhang, Florin Burcea, Helmut Graeb, Tsung-Yi Ho, Hai Li, Ulf Schlichtmann |
| 2021 | ETS | Exploiting Active Learning for Microcontroller Performance Prediction. | Nicol Bellarmino, Riccardo Cantoro, Martin Huch, Tobias Kilian, Raffaele Martone, Ulf Schlichtmann, Giovanni Squillero |
| 2021 | ICCAD | Reliable Memristor-based Neuromorphic Design Using Variation- and Defect-Aware Training. | Di Gao, Grace Li Zhang, Xunzhao Yin, Bing Li, Ulf Schlichtmann, Cheng Zhuo |
| 2021 | ICCAD | BigIntegr: One-Pass Architectural Synthesis for Continuous-Flow Microfluidic Lab-on-a-Chip Systems. | Xing Huang, Youlin Pan, Zhen Chen, Wenzhong Guo, Robert Wille, Tsung-Yi Ho, Ulf Schlichtmann |
| 2021 | ICCAD | Manufacturing Cycle-Time Optimization Using Gaussian Drying Model for Inkjet-Printed Electronics. | Tsun-Ming Tseng, Meng Lian, Mengchu Li, Philipp Rinklin, Leroy Grob, Bernhard Wolfrum, Ulf Schlichtmann |
| 2021 | ICCAD | Peripheral Circuitry Assisted Mapping Framework for Resistive Logic-In-Memory Computing. | Shuhang Zhang, Hai Li, Ulf Schlichtmann |
| 2021 | ICCAD | ToPro: A Topology Projector and Waveguide Router for Wavelength-Routed Optical Networks-on-Chip. | Zhidan Zheng, Mengchu Li, Tsun-Ming Tseng, Ulf Schlichtmann |
| 2021 | ICCAD | Relative-Scheduling-Based High-Level Synthesis for Flow-Based Microfluidic Biochips. | Fangda Zuo, Mengchu Li, Tsun-Ming Tseng, Tsung-Yi Ho, Ulf Schlichtmann |
| 2021 | ITC | A Scalable Design Flow for Performance Monitors Using Functional Path Ring Oscillators. | Tobias Kilian, Heiko Ahrens, Daniel Tille, Martin Huch, Ulf Schlichtmann |
| 2020 | ASPDAC | Maximizing the Communication Parallelism for Wavelength-Routed Optical Networks-On-Chips. | Mengchu Li, Tsun-Ming Tseng, Mahdi Tala, Ulf Schlichtmann |
| 2020 | ASPDAC | Investigating the Inherent Soft Error Resilience of Embedded Applications by Full-System Simulation. | Uzair Sharif, Daniel Mueller-Gritschneder, Ulf Schlichtmann |
| 2020 | ASPDAC | Timing Resilience for Efficient and Secure Circuits. | Grace Li Zhang, Michaela Brunner, Bing Li, Georg Sigl, Ulf Schlichtmann |
| 2020 | DATE | Transport-Free Module Binding for Sample Preparation using Microfluidic Fully Programmable Valve Arrays. | Gautam Choudhary, Sandeep Pal, Debraj Kundu, Sukanta Bhattacharjee, Shigeru Yamashita, Bing Li, Ulf Schlichtmann, Sudip Roy |
| 2020 | DATE | A Pulse-width Modulation Neuron with Continuous Activation for Processing-In-Memory Engines. | Shuhang Zhang, Bing Li, Hai Helen Li, Ulf Schlichtmann |
| 2020 | DATE | Statistical Training for Neuromorphic Computing using Memristor-based Crossbars Considering Process Variations and Noise. | Ying Zhu, Grace Li Zhang, Tianchen Wang, Bing Li, Yiyu Shi, Tsung-Yi Ho, Ulf Schlichtmann |
| 2020 | ICCAD | PathDriver: A Path-Driven Architectural Synthesis Flow for Continuous-Flow Microfluidic Biochips. | Xing Huang, Youlin Pan, Grace Li Zhang, Bing Li, Wenzhong Guo, Tsung-Yi Ho, Ulf Schlichtmann |
| 2020 | ICCAD | Overview of 2020 CAD Contest at ICCAD. | Ing-Chao Lin, Ulf Schlichtmann, Tsung-Wei Huang, Mark Po-Hung Lin |
| 2020 | ICCAD | PSION 2: Optimizing Physical Layout of Wavelength-Routed ONoCs for Laser Power Reduction. | Alexandre Truppel, Tsun-Ming Tseng, Ulf Schlichtmann |
| 2020 | ICCAD | Countering Variations and Thermal Effects for Accurate Optical Neural Networks. | Ying Zhu, Grace Li Zhang, Bing Li, Xunzhao Yin, Cheng Zhuo, Huaxi Gu, Tsung-Yi Ho, Ulf Schlichtmann |
| 2020 | ITC | Machine Learning based Performance Prediction of Microcontrollers using Speed Monitors. | Riccardo Cantoro, Martin Huch, Tobias Kilian, Raffaele Martone, Ulf Schlichtmann, Giovanni Squillero |
| 2020 | VLSID | Runtime Monitoring of Inter- and Intra-Thread Requirements on Embedded MPSoCs. | Marcel Mettler, Daniel Mueller-Gritschneder, Ulf Schlichtmann |
| 2019 | ASPDAC | Machine learning and structural characteristics for reverse engineering. | Johanna Baehr, Alessandro Bernardini, Georg Sigl, Ulf Schlichtmann |
| 2019 | ASPDAC | SeRoHAL: generation of selectively robust hardware abstraction layers for efficient protection of mixed-criticality systems. | Petra R. Kleeberger, Juana Rivera, Daniel Mueller-Gritschneder, Ulf Schlichtmann |
| 2019 | DAC | Cross-Layer Resilience: Challenges, Insights, and the Road Ahead. | Eric Cheng, Daniel Mueller-Gritschneder, Jacob A. Abraham, Pradip Bose, Alper Buyuktosunoglu, Deming Chen, Hyungmin Cho, Yanjing Li, Uzair Sharif, Kevin Skadron, Mircea Stan, Ulf Schlichtmann, Subhasish Mitra |
| 2019 | DAC | MiniControl: Synthesis of Continuous-Flow Microfluidics with Strictly Constrained Control Ports. | Xing Huang, Tsung-Yi Ho, Wenzhong Guo, Bing Li, Ulf Schlichtmann |
| 2019 | DAC | ACCESS: HW/SW Co-Equivalence Checking for Firmware Optimization. | Michael Schwarz, Raphael Stahl, Daniel Mller-Gritschneder, Ulf Schlichtmann, Dominik Stoffel, Wolfgang Kunz |
| 2019 | DATE | Fault Localization in Programmable Microfluidic Devices. | Alessandro Bernardini, Chunfeng Liu, Bing Li, Ulf Schlichtmann |
| 2019 | DATE | Physical Synthesis of Flow-Based Microfluidic Biochips Considering Distributed Channel Storage. | Zhisheng Chen, Xing Huang, Wenzhong Guo, Bing Li, Tsung-Yi Ho, Ulf Schlichtmann |
| 2019 | DATE | Towards Reliable and Secure Post-Quantum Co-Processors based on RISC-V. | Tim Fritzmann, Uzair Sharif, Daniel Mller-Gritschneder, Cezar Reinbrecht, Ulf Schlichtmann, Johanna Seplveda |
| 2019 | DATE | Block-Flushing: A Block-based Washing Algorithm for Programmable Microfluidic Devices. | Yu-Huei Lin, Tsung-Yi Ho, Bing Li, Ulf Schlichtmann |
| 2019 | DATE | SRAM Design Exploration with Integrated Application-Aware Aging Analysis. | Alexandra Listl, Daniel Mueller-Gritschneder, Ulf Schlichtmann, Sani R. Nassif |
| 2019 | DATE | Aging-aware Lifetime Enhancement for Memristor-based Neuromorphic Computing. | Shuhang Zhang, Grace Li Zhang, Bing Li, Hai Helen Li, Ulf Schlichtmann |
| 2019 | ICCAD | VOM: Flow-Path Validation and Control-Sequence Optimization for Multilayered Continuous-Flow Microfluidic Biochips. | Mengchu Li, Tsun-Ming Tseng, Yanlu Ma, Tsung-Yi Ho, Ulf Schlichtmann |
| 2019 | ICCAD | Overview of 2019 CAD Contest at ICCAD. | Ulf Schlichtmann, Sabya Das, Ing-Chao Lin, Mark Po-Hung Lin |
| 2019 | ICCAD | Cloud Columba: Accessible Design Automation Platform for Production and Inspiration: Invited Paper. | Tsun-Ming Tseng, Mengchu Li, Yushen Zhang, Tsung-Yi Ho, Ulf Schlichtmann |
| 2019 | ICCAD | Wavelength-Routed Optical NoCs: Design and EDA - State of the Art and Future Directions: Invited Paper. | Tsun-Ming Tseng, Alexandre Truppel, Mengchu Li, Mahdi Nikdast, Ulf Schlichtmann |
| 2018 | ASPDAC | On enabling diagnosis for 1-Pin Test fails in an industrial flow. | Daniel Tille, Benedikt Gottinger, Ulrike Pfannkuchen, Helmut Graeb, Ulf Schlichtmann |
| 2018 | DAC | PlanarONoC: concurrent placement and routing considering crossing minimization for optical networks-on-chip. | Yu-Kai Chuang, Kuan-Jung Chen, Kun-Lin Lin, Shao-Yun Fang, Bing Li, Ulf Schlichtmann |
| 2018 | DAC | Design-for-testability for continuous-flow microfluidic biochips. | Chunfeng Liu, Bing Li, Tsung-Yi Ho, Krishnendu Chakrabarty, Ulf Schlichtmann |
| 2018 | DAC | Columba S: a scalable co-layout design automation tool for microfluidic large-scale integration. | Tsun-Ming Tseng, Mengchu Li, Daniel Nestor Freitas, Amy Mongersun, Ismail Emre Araci, Tsung-Yi Ho, Ulf Schlichtmann |
| 2018 | DAC | Virtualsync: timing optimization by synchronizing logic waves with sequential and combinational components as delay units. | Grace Li Zhang, Bing Li, Masanori Hashimoto, Ulf Schlichtmann |
| 2018 | DATE | Fault-tolerant valve-based microfluidic routing fabric for droplet barcoding in single-cell analysis. | Yasamin Moradi, Mohamed Ibrahim, Krishnendu Chakrabarty, Ulf Schlichtmann |
| 2018 | DATE | ETISS-ML: A multi-level instruction set simulator with RTL-level fault injection support for the evaluation of cross-layer resiliency techniques. | Daniel Mueller-Gritschneder, Martin Dittrich, Josef Weinzierl, Eric Cheng, Subhasish Mitra, Ulf Schlichtmann |
| 2018 | DATE | TimingCamouflage: Improving circuit security against counterfeiting by unconventional timing. | Grace Li Zhang, Bing Li, Bei Yu, David Z. Pan, Ulf Schlichtmann |
| 2018 | ETS | An efficient fault-tolerant valve-based microfluidic routing fabric for single-cell analysis. | Yasamin Moradi, Krishnendu Chakrabarty, Ulf Schlichtmann |
| 2018 | FDL | Automated Redirection of Hardware Accesses for Host-Compiled Software Simulation. | Rafael Stahl, Daniel Mueller-Gritschneder, Ulf Schlichtmann |
| 2018 | FDL | Automatic Design of Microfluidic Devices. | Robert Wille, Bing Li, Rolf Drechsler, Ulf Schlichtmann |
| 2018 | ICCAD | Wavefront-MCTS: multi-objective design space exploration of NoC architectures based on Monte Carlo tree search. | Yong Hu, Daniel Mueller-Gritschneder, Ulf Schlichtmann |
| 2018 | ICCAD | CustomTopo: a topology generation method for application-specific wavelength-routed optical NoCs. | Mengchu Li, Tsun-Ming Tseng, Davide Bertozzi, Mahdi Tala, Ulf Schlichtmann |
| 2018 | ICCAD | Performance and accuracy in soft-error resilience evaluation using the multi-level processor simulator ETISS-ML. | Daniel Mueller-Gritschneder, Uzair Sharif, Ulf Schlichtmann |
| 2018 | ICCAD | Multi-channel and fault-tolerant control multiplexing for flow-based microfluidic biochips. | Ying Zhu, Bing Li, Tsung-Yi Ho, Qin Wang, Hailong Yao, Robert Wille, Ulf Schlichtmann |
| 2018 | IOLTS | Emulation of an ASIC Power, Temperature and Aging Monitor System for FPGA Prototyping. | Alexandra Listl, Daniel Mueller-Gritschneder, Fabian Kluge, Ulf Schlichtmann |
| 2018 | IOLTS | Efficient Fault Injection for Embedded Systems: As Fast as Possible but as Accurate as Necessary. | Petra R. Maier, Uzair Sharif, Daniel Mueller-Gritschneder, Ulf Schlichtmann |
| 2018 | ISCAS | Thermal-Aware Placement and Routing for 3D Optical Networks-on-Chips. | Fengxian Jiao, Sheqin Dong, Bei Yu, Bing Li, Ulf Schlichtmann |
| 2017 | ASPDAC | Hamming-distance-based valve-switching optimization for control-layer multiplexing in flow-based microfluidic biochips. | Qin Wang, Shiliang Zuo, Hailong Yao, Tsung-Yi Ho, Bing Li, Ulf Schlichtmann, Yici Cai |
| 2017 | DAC | Component-Oriented High-level Synthesis for Continuous-Flow Microfluidics Considering Hybrid-Scheduling. | Mengchu Li, Tsun-Ming Tseng, Bing Li, Tsung-Yi Ho, Ulf Schlichtmann |
| 2017 | DAC | Transport or Store?: Synthesizing Flow-based Microfluidic Biochips using Distributed Channel Storage. | Chunfeng Liu, Bing Li, Hailong Yao, Paul Pop, Tsung-Yi Ho, Ulf Schlichtmann |
| 2017 | DATE | CoSyn: Efficient single-cell analysis using a hybrid microfluidic platform. | Mohamed Ibrahim, Krishnendu Chakrabarty, Ulf Schlichtmann |
| 2017 | DATE | Testing microfluidic Fully Programmable Valve Arrays (FPVAs). | Chunfeng Liu, Bing Li, Bhargab B. Bhattacharya, Krishnendu Chakrabarty, Tsung-Yi Ho, Ulf Schlichtmann |
| 2017 | ICCAD | Sortex: Efficient timing-driven synthesis of reconfigurable flow-based biochips for scalable single-cell screening. | Mohamed Ibrahim, Aditya Sridhar, Krishnendu Chakrabarty, Ulf Schlichtmann |
| 2017 | ISCAS | Methodology for automated phase noise minimization in RF circuit interconnect trees. | Dimo Martev, Sven Hampel, Ulf Schlichtmann |
| 2017 | RSP | The extendable translating instruction set simulator (ETISS) interlinked with an MDA framework for fast RISC prototyping. | Daniel Mueller-Gritschneder, Keerthikumara Devarajegowda, Martin Dittrich, Wolfgang Ecker, Marc Greim, Ulf Schlichtmann |
| 2016 | ASPDAC | Reliability, adaptability and flexibility in timing: Buy a life insurance for your circuits. | Ulf Schlichtmann, Masanori Hashimoto, Iris Hui-Ru Jiang, Bing Li |
| 2016 | DAC | Columba: co-layout synthesis for continuous-flow microfluidic biochips. | Tsun-Ming Tseng, Mengchu Li, Bing Li, Tsung-Yi Ho, Ulf Schlichtmann |
| 2016 | DAC | Novel CMOS RFIC layout generation with concurrent device placement and fixed-length microstrip routing. | Tsun-Ming Tseng, Bing Li, Ching-Feng Yeh, Hsiang-Chieh Jhan, Zuo-Min Tsai, Mark Po-Hung Lin, Ulf Schlichtmann |
| 2016 | DAC | EffiTest: efficient delay test and statistical prediction for configuring post-silicon tunable buffers. | Grace Li Zhang, Bing Li, Ulf Schlichtmann |
| 2016 | DATE | Sieve-valve-aware synthesis of flow-based microfluidic biochips considering specific biological execution limitations. | Mengchu Li, Tsun-Ming Tseng, Bing Li, Tsung-Yi Ho, Ulf Schlichtmann |
| 2016 | DATE | Sampling-based buffer insertion for post-silicon yield improvement under process variability. | Grace Li Zhang, Bing Li, Ulf Schlichtmann |
| 2016 | ICCAD | Where formal verification can help in functional safety analysis. | Alessandro Bernardini, Wolfgang Ecker, Ulf Schlichtmann |
| 2016 | ICCAD | Control-fluidic CoDesign for paper-based digital microfluidic biochips. | Qin Wang, Zeyan Li, Haena Cheong, Oh-Sun Kwon, Hailong Yao, Tsung-Yi Ho, Kwanwoo Shin, Bing Li, Ulf Schlichtmann, Yici Cai |
| 2016 | ICCAD | From biochips to quantum circuits: computer-aided design for emerging technologies. | Robert Wille, Bing Li, Ulf Schlichtmann, Rolf Drechsler |
| 2016 | ICCAD | PieceTimer: a holistic timing analysis framework considering setup/hold time interdependency using a piecewise model. | Grace Li Zhang, Bing Li, Ulf Schlichtmann |
| 2015 | DAC | GRIP: grammar-based IP integration and packaging for acceleration-rich SoC designs. | Munish Jassi, Daniel Mller-Gritschneder, Ulf Schlichtmann |
| 2015 | DAC | Reliability-aware synthesis for flow-based microfluidic biochips by dynamic-device mapping. | Tsun-Ming Tseng, Bing Li, Tsung-Yi Ho, Ulf Schlichtmann |
| 2015 | DATE | Timing verification for adaptive integrated circuits. | Rohit Kumar, Bing Li, Yiren Shen, Ulf Schlichtmann, Jiang Hu |
| 2015 | SCOPES | Runtime Adaptation of Application Execution under Thermal and Power Constraints in Massively Parallel Processor Arrays. | ricles Sousa, Frank Hannig, Jrgen Teich, Qingqing Chen, Ulf Schlichtmann |
| 2014 | DAC | Workload- and Instruction-Aware Timing Analysis: The missing Link between Technology and System-level Resilience. | Veit Kleeberger, Petra R. Maier, Ulf Schlichtmann |
| 2014 | DAC | Safety Evaluation of Automotive Electronics Using Virtual Prototypes: State of the Art and Research Challenges. | Jan-Hendrik Oetjens, Nico Bannow, Markus Becker, Oliver Bringmann, Andreas Burger, Moomen Chaari, Samarjit Chakraborty, Rolf Drechsler, Wolfgang Ecker, Kim Grttner, Thomas Kruse, Christoph Kuznik, Hoang Minh Le, Andreas Mauderer, Wolfgang Mller, Daniel Mller-Gritschneder, Frank Poppen, Hendrik Post, Sebastian Reiter, Wolfgang Rosenstiel, S. Roth, Ulf Schlichtmann, Andreas von Schwerin, Bogdan-Andrei Tabacaru, Alexander Viehl |
| 2014 | DATE | Probabilistic standard cell modeling considering non-Gaussian parameters and correlations. | Andr Lange, Christoph Sohrmann, Roland Jancke, Joachim Haase, Ingolf Lorenz, Ulf Schlichtmann |
| 2014 | DATE | Special session: How secure are PUFs really? On the reach and limits of recent PUF attacks. | Ulrich Rhrmair, Ulf Schlichtmann, Wayne P. Burleson |
| 2014 | DATE | Connecting different worlds - Technology abstraction for reliability-aware design and Test. | Ulf Schlichtmann, Veit Kleeberger, Jacob A. Abraham, Adrian Evans, Christina Gimmler-Dumont, Michael Gla, Andreas Herkersdorf, Sani R. Nassif, Norbert Wehn |
| 2013 | ASPDAC | Memory access reconstruction based on memory allocation mechanism for source-level simulation of embedded software. | Kun Lu, Daniel Mueller-Gritschneder, Ulf Schlichtmann |
| 2013 | DAC | Reliability challenges for electric vehicles: from devices to architecture and systems software. | Georg Georgakos, Ulf Schlichtmann, Reinhard Schneider, Samarjit Chakraborty |
| 2013 | DAC | Predicting future product performance: modeling and evaluation of standard cells in FinFET technologies. | Veit Kleeberger, Helmut E. Graeb, Ulf Schlichtmann |
| 2013 | DATE | Fast cache simulation for host-compiled simulation of embedded software. | Kun Lu, Daniel Mueller-Gritschneder, Ulf Schlichtmann |
| 2013 | DATE | Analytical timing estimation for temporally decoupled TLMs considering resource conflicts. | Kun Lu, Daniel Mueller-Gritschneder, Ulf Schlichtmann |
| 2013 | DATE | A virtual prototyping platform for real-time systems with a case study for a two-wheeled robot. | Daniel Mueller-Gritschneder, Kun Lu, Erik Wallander, Marc Greim, Ulf Schlichtmann |
| 2013 | DATE | A spectral clustering approach to application-specific network-on-chip synthesis. | Vladimir Todorov, Daniel Mueller-Gritschneder, Helmut Reinig, Ulf Schlichtmann |
| 2013 | ICCAD | PROTON: an automatic place-and-route tool for optical networks-on-chip. | Anja Boos, Luca Ramini, Ulf Schlichtmann, Davide Bertozzi |
| 2013 | ICCAD | Post-route alleviation of dense meander segments in high-performance printed circuit boards. | Tsun-Ming Tseng, Bing Li, Tsung-Yi Ho, Ulf Schlichtmann |
| 2012 | DATE | Characterization of the bistable ring PUF. | Qingqing Chen, Gyrgy Csaba, Paolo Lugli, Ulf Schlichtmann, Ulrich Rhrmair |
| 2012 | DATE | Current source modeling for power and timing analysis at different supply voltages. | Christoph Knoth, Hela Jedda, Ulf Schlichtmann |
| 2012 | DATE | Accurately timed transaction level models for virtual prototyping at high abstraction level. | Kun Lu, Daniel Mueller-Gritschneder, Ulf Schlichtmann |
| 2012 | DATE | Automated construction of a cycle-approximate transaction level model of a memory controller. | Vladimir Todorov, Daniel Mueller-Gritschneder, Helmut Reinig, Ulf Schlichtmann |
| 2012 | RTCSA | Schedulability Analysis for Processors with Aging-Aware Autonomic Frequency Scaling. | Alejandro Masrur, Philipp H. Kindt, Martin Becker, Samarjit Chakraborty, Veit Kleeberger, Martin Barke, Ulf Schlichtmann |
| 2011 | DSD | Control-Flow-Driven Source Level Timing Annotation for Embedded Software Models on Transaction Level. | Daniel Mueller-Gritschneder, Kun Lu, Ulf Schlichtmann |
| 2010 | ICCAD | Fast statistical timing analysis of latch-controlled circuits for arbitrary clock periods. | Bing Li, Ning Chen, Ulf Schlichtmann |
| 2010 | ICCAD | Aging analysis at gate and macro cell level. | Dominik Lorenz, Martin Barke, Ulf Schlichtmann |
| 2010 | WISTP | Towards Electrical, Integrated Implementations of SIMPL Systems. | Ulrich Rhrmair, Qingqing Chen, Martin Stutzmann, Paolo Lugli, Ulf Schlichtmann, Gyrgy Csaba |
| 2009 | DATE | On hierarchical statistical static timing analysis. | Bing Li, Ning Chen, Manuel Schmidt, Walter Schneider, Ulf Schlichtmann |
| 2009 | DATE | Digital design at a crossroads How to make statistical design methodologies industrially relevant. | Ulf Schlichtmann, Manuel Schmidt, Harald Kinzelbach, Michael Pronath, Volker Glckel, Manfred Dietrich, Uwe Eichler, Joachim Haase |
| 2009 | ICCAD | Timing model extraction for sequential circuits considering process variations. | Bing Li, Ning Chen, Ulf Schlichtmann |
| 2009 | IOLTS | Aging analysis of circuit timing considering NBTI and HCI. | Dominik Lorenz, Georg Georgakos, Ulf Schlichtmann |
| 2008 | DATE | Sizing Rules for Bipolar Analog Circuit Design. | Tobias Massier, Helmut E. Graeb, Ulf Schlichtmann |
| 2008 | ICCAD | Deterministic analog circuit placement using hierarchically bounded enumeration and enhanced shape functions. | Martin Strasser, Michael Eick, Helmut Grb, Ulf Schlichtmann, Frank M. Johannes |
| 2008 | ICCD | A random and pseudo-gradient approach for analog circuit sizing with non-uniformly discretized parameters. | Michael Pehl, Tobias Massier, Helmut E. Graeb, Ulf Schlichtmann |
| 2007 | DATE | Trade-off design of analog circuits using goal attainment and "Wave Front" sequential quadratic programming. | Daniel Mueller, Helmut E. Graeb, Ulf Schlichtmann |
| 2006 | DAC | A CPPLL hierarchical optimization methodology considering jitter, power and locking time. | Jun Zou, Daniel Mueller, Helmut E. Graeb, Ulf Schlichtmann |
| 2006 | DATE | DFM/DFY design for manufacturability and yield - influence of process variations in digital, analog and mixed-signal circuit design. | Markus Bhler, Jrgen Koehl, Jeanne Bickford, Jason Hibbeler, Ulf Schlichtmann, Ralf Sommer, Michael Pronath, Andreas Ripp |
| 2006 | ISCAS | Fast evaluation of analog circuit structures by polytopal approximations. | Daniel Mueller, Guido Stehr, Helmut E. Graeb, Ulf Schlichtmann |
| 2005 | DAC | Deterministic approaches to analog performance space exploration (PSE). | Daniel Mueller, Guido Stehr, Helmut E. Graeb, Ulf Schlichtmann |
| 2005 | GI | Eigenschaftsraumexploration bei der hierarchischen Dimensionierung analoger integrierter Schaltungen. | Daniel Mueller, Guido Stehr, Helmut E. Graeb, Ulf Schlichtmann |
| 2004 | DATE | Extremely Low-Power Logic. | Christian Piguet, Jacques Gautier, Christoph Heer, Ian O'Connor, Ulf Schlichtmann |
| 2004 | DSD | Design Methodology Innovations Address Manufacturing Technology Challenges: Power and Performance. | Ulf Schlichtmann |
| 2002 | DATE | Power Crisis in SoC Design: Strategies for Constructing Low-Power, High-Performance SoC Designs. | K. Brock, C. Edwards, R. Lannoo, Ulf Schlichtmann, Antun Domic, Jacques Benkoski, David Overhauser, M. Kliment |
| 2002 | DSD | Systems Are Made from Transistors: UDSM Technology Creates New Challenges for Library and IC Development. | Ulf Schlichtmann |
| 1992 | DAC | Characterization of Boolean Functions for Rapid Matching in FPGA Technology Mapping. | Ulf Schlichtmann, Franc Brglez, Michael Hermann |