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Wayne P. Burleson

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

53

Venues

18

Active years

1991–2025

Best venue rank

A*

Where they publish

Papers

53 indexed papers, newest first.

YearVenueTitleAuthors
2025DATEGradient Approximation of Approximate Multipliers for High-Accuracy Deep Neural Network Retraining.Chang Meng, Wayne P. Burleson, Weikang Qian, Giovanni De Micheli
2024ICCADRareLS: Rarity-Reducing Logic Synthesis for Mitigating Hardware Trojan Threats.Chang Meng, Mingfei Yu, Hanyu Wang, Wayne P. Burleson, Giovanni De Micheli
2020CCSErasable PUFs: Formal Treatment and Generic Design.Chenglu Jin, Wayne P. Burleson, Marten van Dijk, Ulrich Rhrmair
2017DATEAn asynchronous NoC router in a 14nm FinFET library: Comparison to an industrial synchronous counterpart.Weiwei Jiang, Davide Bertozzi, Gabriele Miorandi, Steven M. Nowick, Wayne P. Burleson, Greg Sadowski
2016DACInvited - Who is the major threat to tomorrow's security?: you, the hardware designer.Wayne P. Burleson, Onur Mutlu, Mohit Tiwari
2015SPVirtual Proofs of Reality and their Physical Implementation.Ulrich Rhrmair, J. L. Martinez-Hurtado, Xiaolin Xu, Christian Kraeh, Christian Hilgers, Dima Kononchuk, Jonathan J. Finley, Wayne P. Burleson
2014CHESEfficient Power and Timing Side Channels for Physical Unclonable Functions.Ulrich Rhrmair, Xiaolin Xu, Jan Slter, Ahmed Mahmoud, Mehrdad Majzoobi, Farinaz Koushanfar, Wayne P. Burleson
2014DACModeling and Experimental Demonstration of Accelerated Self-Healing Techniques.Xinfei Guo, Wayne P. Burleson, Mircea R. Stan
2014DATESpecial session: How secure are PUFs really? On the reach and limits of recent PUF attacks.Ulrich Rhrmair, Ulf Schlichtmann, Wayne P. Burleson
2014DATEHybrid side-channel/machine-learning attacks on PUFs: A new threat?Xiaolin Xu, Wayne P. Burleson
2014FDTCParametric Trojans for Fault-Injection Attacks on Cryptographic Hardware.Raghavan Kumar, Philipp Jovanovic, Wayne P. Burleson, Ilia Polian
2014ICCDModeling and analysis of Phase Change Materials for efficient thermal management.Fulya Kaplan, Charlie De Vivero, Samuel Howes, Manish Arora, Houman Homayoun, Wayne P. Burleson, Dean M. Tullsen, Ayse K. Coskun
2014ICCDHybrid modeling attacks on current-based PUFs.Raghavan Kumar, Wayne P. Burleson
2014MEMOCODEKeynote talk I: Security and privacy in implantable medical devices: An ongoing concern.Wayne P. Burleson
2013CHESStealthy Dopant-Level Hardware Trojans.Georg T. Becker, Francesco Regazzoni, Christof Paar, Wayne P. Burleson
2013DACBalancing security and utility in medical devices?Masoud Rostami, Wayne P. Burleson, Farinaz Koushanfar, Ari Juels
2013DATERun-time probabilistic detection of miscalibrated thermal sensors in many-core systems.Jia Zhao, Shiting (Justin) Lu, Wayne P. Burleson, Russell Tessier
2013ISLPEDLow-power Networks-on-Chip: Progress and remaining challenges.Mark Buckler, Wayne P. Burleson, Greg Sadowski
2013ISLPEDLitho-aware and low power design of a secure current-based physically unclonable function.Raghavan Kumar, Wayne P. Burleson
2013VLSIDImpact of Clock-Gating on Power Distribution Network Using Wavelet Analysis.Vinay C. Patil, Sudarshan Srinivasan, Wayne P. Burleson, Sandip Kundu
2012DACDesign challenges for secure implantable medical devices.Wayne P. Burleson, Shane S. Clark, Benjamin Ransford, Kevin Fu
2012ICCADCollaborative calibration of on-chip thermal sensors using performance counters.Shiting (Justin) Lu, Russell Tessier, Wayne P. Burleson
2012MICROPHAP: Password based Hardware Authentication using PUFs.Raghavan Kumar, Wayne P. Burleson
2011ICCDImplementing hardware Trojans: Experiences from a hardware Trojan challenge.Georg T. Becker, Ashwin Lakshminarasimhan, Lang Lin, Sudheendra Srivathsa, Vikram B. Suresh, Wayne P. Burleson
2010DATEMulticore soft error rate stabilization using adaptive dual modular redundancy.Ramakrishna Vadlamani, Jia Zhao, Wayne P. Burleson, Russell Tessier
2010ISLPEDLow-power sub-threshold design of secure physical unclonable functions.Lang Lin, Daniel E. Holcomb, Dilip Kumar Krishnappa, Prasad Shabadi, Wayne P. Burleson
2009CHESTrojan Side-Channels: Lightweight Hardware Trojans through Side-Channel Engineering.Lang Lin, Markus Kasper, Tim Gneysu, Christof Paar, Wayne P. Burleson
2009DACAnalysis and mitigation of process variation impacts on Power-Attack Tolerance.Lang Lin, Wayne P. Burleson
2009DATEA monitor interconnect and support subsystem for multicore processors.Sailaja Madduri, Ramakrishna Vadlamani, Wayne P. Burleson, Russell Tessier
2009ICCADMOLES: Malicious off-chip leakage enabled by side-channels.Lang Lin, Wayne P. Burleson, Christof Paar
2008ISCASLeakage-based differential power analysis (LDPA) on sub-90nm CMOS cryptosystems.Lang Lin, Wayne P. Burleson
2005VLSIDImpact of Process Variations on Multi-Level Signaling for On-Chip Interconnects.Vishak Venkatraman, Wayne P. Burleson
2004DATESynchro-Tokens: Eliminating Nondeterminism to Enable Chip-Level Test of Globally-Asynchronous Locally-Synchronous SoC?s.Matthew W. Heath, Wayne P. Burleson, Ian G. Harris
2003ICIPAdaptive system on a chip (ASOC): a backbone for power-aware signal processing cores.Andrew Laffely, Jian Liang, Russell Tessier, Wayne P. Burleson
2002FPGAA dynamically reconfigurable adaptive viterbi decoder.Sriram Swaminathan, Russell Tessier, Dennis Goeckel, Wayne P. Burleson
2001ICASSPDynamically parameterized algorithms and architectures to exploit signal variations for improved performance and reduced power.Wayne P. Burleson, Russell Tessier, Dennis Goeckel, Sriram Swaminathan, Prashant Jain, Jeongseon Euh, Subramanian Venkatraman, Vidhya Thyagarajan
2000FPGALow power digital design in FPGAs (poster abstract): a study of pipeline architectures implemented in a FPGA using a low supply voltage to reduce power consumption.Andrs D. Garca, Jean-Luc Danger, Wayne P. Burleson
2000ISCASLow power digital design in FPGAs: a study of pipeline architectures implemented in a FPGA using a low supply voltage to reduce power consumption.Andrs D. Garca, Wayne P. Burleson, Jean-Luc Danger
2000ISCASRepeater insertion in deep sub-micron CMOS: ramp-based analytical model and placement sensitivity analysis.Ankireddy Nalamalpu, Wayne P. Burleson
1999FPGAConfiguration Cloning: Exploiting Regularity in Dynamic DSP Architectures.S. R. Park, Wayne P. Burleson
1999FPLPower Modelling in Field Programmable Gate Arrays (FPGA).Andrs D. Garca, Wayne P. Burleson, Jean-Luc Danger
1998ICASSPReconfiguration for power saving in real-time motion estimation.S. R. Park, Wayne P. Burleson
1997ICASSPAn FPGA-based data acquisition system for a 95 GHz W-band radar.Michael Petronino, Ray Bambha, James R. Carswell, Wayne P. Burleson
1996ISLPEDTwo dimensional codes for low power.Mircea R. Stan, Wayne P. Burleson
1995DACEquivalence Checking of Datapaths Based on Canonical Arithmetic Expressions.Zheng Zhou, Wayne P. Burleson
1995ISCASHigh-Level Estimation of High-Performance Architectures for Reed-Solomon Decoding.Yongjin Jeong, Wayne P. Burleson
1994ISCASForum: Wave-pipelining: Is it Practical?Wayne P. Burleson, Leonard W. Cotten, Fabian Klass, Maciej J. Ciesielski
1994ISCASA VLSI Systolic Array Architecture for Lempel-Ziv-Based Data Compression.Bongjin Jung, Wayne P. Burleson
1993ICCDThe Spring Scheduling Co-Processor: A Scheduling Accelerator.Wayne P. Burleson, Jason Ko, Douglas Niehaus, Krithi Ramamritham, John A. Stankovic, Gary Wallace, Charles C. Weems
1993ISCASRank-order Filtering Algorithms: A Comparison of VLSI Implementations.J. David Narkiewicz, Wayne P. Burleson
1993RTSSThe Spring Scheduling Co-Processor: Design, Use, and Performance.Douglas Niehaus, Krithi Ramamritham, John A. Stankovic, Gary Wallace, Charles C. Weems, Wayne P. Burleson, Jason Ko
1991ICASSPThe partitioning problem on VLSI arrays: I/O and local memory complexity.Wayne P. Burleson
1991ICCDA Simulator for General Purpose Optical Arrays.Walter B. Marvin, Wayne P. Burleson