| 2001 | Design technology productivity in the DSM era (invited talk). | Andrew B. Kahng |
| 2001 | Synthesis of four-phase asynchronous control circuits from pipeline dependency graphs. | Hiroto Kagotani, Takuji Okamoto, Takashi Nanya |
| 2001 | Short circuit power estimation of static CMOS circuits. | Seung-Ho Jung, Jong-Humn Baek, Seok-Yoon Kim |
| 2001 | KSim: a stable and efficient RKC simulator for capturing on-chip inductance effect. | Hao Ji, Anirudh Devgan, Wayne Wei-Ming Dai |
| 2001 | High-level synthesis under multi-cycle interconnect delay. | Jinhwan Jeon, Daehong Kim, Dongwan Shin, Kiyoung Choi |
| 2001 | A system level memory power optimization technique using multiple supply and threshold voltages. | Tohru Ishihara, Kunihiro Asada |
| 2001 | Reusable embedded in-circuit emulator. | Ing-Jer Huang, Hsin-Ming Chen, Chung-Fu Kao |
| 2001 | On speeding up extended finite state machines using catalyst circuitry. | Shi-Yu Huang |
| 2001 | Towards the logic defect diagnosis for partial-scan designs. | Shi-Yu Huang |
| 2001 | A new congestion-driven placement algorithm based on cell inflation. | Wenting Hou, Hong Yu, Xianlong Hong, Yici Cai, Weimin Wu, Jun Gu, William H. Kao |
| 2001 | Design for testability strategies using full/partial scan designs and test point insertions to reduce test application times. | Toshinori Hosokawa, Masayoshi Yoshimura, Mitsuyasu Ohta |
| 2001 | Balanced truncation with spectral shaping for RLC interconnects. | Payam Heydari, Massoud Pedram |
| 2001 | Virtual Java/FPGA interface for networked reconfiguration. | Yajun Ha, Geert Vanmeerbeeck, Patrick Schaumont, Serge Vernalde, Marc Engels, Rudy Lauwereins, Hugo De Man |
| 2001 | Post-layout transistor sizing for power reduction in cell-based design. | Masanori Hashimoto, Hidetoshi Onodera |
| 2001 | Coarse grain reconfigurable architecture (embedded tutorial). | Reiner W. Hartenstein |
| 2001 | Automated synthesis of pipelined designs on FPGAs for signal and image processing applications described in MATLAB. | Malay Haldar, Anshuman Nayak, Alok N. Choudhary, Prithviraj Banerjee |
| 2001 | Application of linearly transformed BDDs in sequential verification. | Wolfgang Gnther, Andreas Hett, Bernd Becker |
| 2001 | LEneS: task scheduling for low-energy systems using variable supply voltage processors. | Flavius Gruian, Krzysztof Kuchcinski |
| 2001 | An optimum fitting algorithm for generation of reduced-order models. | Mark M. Gourary, Sergey G. Rusakov, Sergey L. Ulyanov, Michael M. Zharov, Brian J. Mulvaney |
| 2001 | Trace-driven system-level power evaluation of system-on-a-chip peripheral cores. | Tony Givargis, Frank Vahid, Jrg Henkel |
| 2001 | Low power implementation of a turbo-decoder on programmable architectures. | Frank Gilbert, Alexander Worm, Norbert Wehn |
| 2001 | Scalable and flexible cosimulation of SoC designs with heterogeneous multi-processor target architectures. | Patrice Gerin, Sungjoo Yoo, Gabriela Nicolescu, Ahmed Amine Jerraya |
| 2001 | A fast and accurate delay estimation method for buffered interconnects. | Youxin Gao, D. F. Wong |
| 2001 | Precise extraction of ultra deep submicron interconnect parasitics with parameterizable 3D-modeling: invited talk. | Martin R. Frerichs |
| 2001 | Combinatorial routing analysis and design of universal switch blocks. | Hongbing Fan, Jiping Liu, Yu-Liang Wu |