| 2015 | DP-fill: a dynamic programming approach to X-filling for minimizing peak test power in scan tests. | Satya Trinadh, Ch. Sobhan Babu, Shiv Govind Singh, Seetal Potluri, V. Kamakoti |
| 2015 | Exploring the impact of functional test programs re-used for power-aware testing. | Aymen Touati, Alberto Bosio, Luigi Dilillo, Patrick Girard, Arnaud Virazel, Paolo Bernardi, Matteo Sonza Reorda |
| 2015 | Transparent linking of compiled software and synthesized hardware. | David B. Thomas, Shane T. Fleming, George A. Constantinides, Dan R. Ghica |
| 2015 | Analysis of ethernet-switch traffic shapers for in-vehicle networking applications. | Sivakumar Thangamuthu, Nicola Concer, Pieter J. L. Cuijpers, Johan J. Lukkien |
| 2015 | Fast optical simulation from a reduced set of impulse responses using SystemC-AMS. | Fabien Teysseyre, David Navarro, Ian O'Connor, Francesco Cascio, Fabio Cenni, Olivier Guillaume |
| 2015 | Energy versus data integrity trade-offs in embedded high-density logic compatible dynamic memories. | Adam Teman, Georgios Karakonstantis, Robert Giterman, Pascal Andreas Meinerzhagen, Andreas Peter Burg |
| 2015 | Reducing trace size in multimedia applications endurance tests. | Serge Vladimir Emteu Tchagou, Alexandre Termier, Jean-Franois Mhaut, Brice Videau, Miguel Santana, Ren Quiniou |
| 2015 | Soft-error reliability and power co-optimization for GPGPUS register file using resistive memory. | Jingweijia Tan, Zhi Li, Xin Fu |
| 2015 | Spiking neural network with RRAM: can we use it for real-world application? | Tianqi Tang, Lixue Xia, Boxun Li, Rong Luo, Yiran Chen, Yu Wang, Huazhong Yang |
| 2015 | Dynamic reconfigurable puncturing for secure wireless communication. | Liang Tang, Jude Angelo Ambrose, Akash Kumar, Sri Parameswaran |
| 2015 | A methodology for automated design of embedded bit-flips detectors in post-silicon validation. | Pouya Taatizadeh, Nicola Nicolici |
| 2015 | From device to system: cross-layer design exploration of racetrack memory. | Guangyu Sun, Chao Zhang, Hehe Li, Yue Zhang, Weiqi Zhang, Yizi Gu, Yinan Sun, Jacques-Olivier Klein, Dafine Ravelosona, Yongpan Liu, Weisheng Zhao, Huazhong Yang |
| 2015 | Formal verification of sequential Galois field arithmetic circuits using algebraic geometry. | Xiaojun Sun, Priyank Kalla, Tim Pruss, Florian Enescu |
| 2015 | SubHunter: a high-performance and scalable sub-circuit recognition method with Prfer-encoding. | Hong-Yan Su, Chih-Hao Hsu, Yih-Lang Li |
| 2015 | Scandalee: a side-channel-based disassembler using local electromagnetic emanations. | Daehyun Strobel, Florian Bache, David F. Oswald, Falk Schellenberg, Christof Paar |
| 2015 | Automated feature localization for dynamically generated SystemC designs. | Jannis Stoppe, Robert Wille, Rolf Drechsler |
| 2015 | Topology identification for smart cells in modular batteries. | Sebastian Steinhorst, Martin Lukasiewycz |
| 2015 | Integrated CMOS receiver for wearable coil arrays in MRI applications. | Benjamin Sporrer, Luca Bettini, Christian Vogt, Andreas Mehmann, Jonas Reber, Josip Marjanovic, David O. Brunner, Thomas Burger, Klaas Paul Pruessmann, Gerhard Trster, Qiuting Huang |
| 2015 | A small non-volatile write buffer to reduce storage writes in smartphones. | Mungyu Son, Sungkwang Lee, Kyungho Kim, Sungjoo Yoo, Sunggu Lee |
| 2015 | AHEAD: automated framework for hardware accelerated iterative data analysis. | Ebrahim M. Songhori, Azalia Mirhoseini, Xuyang Lu, Farinaz Koushanfar |
| 2015 | A unified hardware/software MPSoC system construction and run-time framework. | Sam Skalicky, Andrew G. Schmidt, Sonia Lpez, Matthew French |
| 2015 | Predictive dynamic thermal and power management for heterogeneous mobile platforms. | Gaurav Singla, Gurinderjit Kaur, Ali K. Unver, mit Y. Ogras |
| 2015 | Comparative study of power-gating architectures for nonvolatile FinFET-SRAM using spintronics-based retention technology. | Yusuke Shuto, Shuu'ichirou Yamamoto, Satoshi Sugahara |
| 2015 | Monolithic 3D integration: a path from concept to reality. | Max M. Shulaker, Tony F. Wu, Mohamed M. Sabry, Hai Wei, H.-S. Philip Wong, Subhasish Mitra |
| 2015 | Minimizing the number of process corner simulations during design verification. | Michael Shoniker, Bruce F. Cockburn, Jie Han, Witold Pedrycz |