| 2007 | Automatic Generation of Circuits for Approximate String Matching. | Toms Martnek, Otto Fuck, Patrik Beck, Matej Lexa |
| 2007 | An Improved MDCT IP Core Generator with Architectural Model Simulation. | Peter Malk, Marcel Balz, Toms Pikula, Martin Simlastk |
| 2007 | Reticle Exposure Plans for Multi-Project Wafers. | Rung-Bin Lin, Da-Wei Hsu, Ming-Hsine Kuo, Meng-Chiou Wu |
| 2007 | Analysis of Noise Margins Due to Device Parameter Variations in Sub-100nm CMOS Technology. | Zhicheng Liang, Makoto Ikeda, Kunihiro Asada |
| 2007 | A Heuristic for Concurrent SOC Test Scheduling with Compression and Sharing. | Anders Larsson, Erik Larsson, Petru Eles, Zebo Peng |
| 2007 | Instruction Memory Architecture Evaluation on Multiprocessor FPGA MPEG-4 Encoder. | Ari Kulmala, Erno Salminen, Timo D. Hmlinen |
| 2007 | Fault Injection and Simulation for Fault Tolerant Reconfigurable Duplex System. | Pavel Kubalk, Jir Kvasnicka, Hana Kubtov |
| 2007 | Flip-Flops and Scan-Path Elements for Nanoelectronics. | Ren Kothe, Heinrich Theodor Vierhaus |
| 2007 | Designing Time-to-Digital Converter for Asynchronous ADCs. | Dariusz Koscielnik, Marek Miskowicz |
| 2007 | Intrusion Detection System Intended for Multigigabit Networks. | Jan Korenek, Petr Kobiersk |
| 2007 | A Low Noise and Low Power CMOS Image Sensor with Pixel-level Correlated Double Sampling. | Dongsoo Kim, Gunhee Han |
| 2007 | Open Defects Caused by Scratches and Yield Modelling in Deep Sub-micron Integrated Circuit. | Wlodzimierz Jonca |
| 2007 | Layout to Logic Defect Analysis for Hierarchical Test Generation. | Maksim Jenihhin, Jaan Raik, Raimund Ubar, Witold A. Pleskacz, Michal Rakowski |
| 2007 | Test Pattern Compression Based on Pattern Overlapping. | Jiri Jencek, Ondrej Novk |
| 2007 | FPGA Implementation of Strongly Parallel Histogram Equalization. | Ernest Jamro, Maciej Wielgosz, Kazimierz Wiatr |
| 2007 | Decomposition of Logic Functions in Reed-Muller Spectral Domain. | Edward Hrynkiewicz, Stefan Kolodzinski |
| 2007 | On Variable Selection in SAT-LP-based Bounded Model Checking of Linear Hybrid Automata. | Marc Herbstritt, Bernd Becker, Erika brahm, Christian Herde |
| 2007 | Feasibility of Image Compression in FPGA-based Neural Networks. | Vladimir Havel, Karel K. Vlcek |
| 2007 | A March-based Fault Location Algorithm with Partial and Full Diagnosis for All Simple Static Faults in Random Access Memories. | Gurgen Harutunyan, Valery A. Vardanian, Yervant Zorian |
| 2007 | Evolutionary System for Analog Test Frequencies Selection with Fuzzy Initialization. | Tomasz Golonek, Damian Grzechca, Jerzy Rutkowski |
| 2007 | Architecture for Highly Reliable Embedded Flash Memories. | Benot Godard, Jean Michel Daga, Lionel Torres, Gilles Sassatelli |
| 2007 | Accurately Determining Bridging Defects from Layout. | Maria Gkatziani, Rohit Kapur, Qing Su, Ben Mathew, Roberto Mattiuzzo, Laura Tarantini, Cy Hay, Salvatore Talluto, Thomas W. Williams |
| 2007 | A Framework for Self-Healing Radiation-Tolerant Implementations on Reconfigurable FPGAs. | Manuel G. Gericota, Lus F. Lemos, Gustavo R. Alves, Jos M. Ferreira |
| 2007 | Avoiding Crosstalk Influence on Interconnect Delay Fault Testing. | Tomasz Garbolino, Krzysztof Gucwa, Michal Kopec, Andrzej Hlawiczka |
| 2007 | New Strategies for System-Level Design. | Daniel D. Gajski |