IEEE European Test Symposium
ETS
B
CORE rank
CORE rank (raw)
B
Fields of research
Computer Systems Engineering
Papers indexed
1,163
1999–2026
Papers per year
199968 peak2026
Most published authors
ETS papers
1,163 records sourced from DBLP. Search titles, filter by year, sort by recency.
| Year | Title | Authors |
|---|---|---|
| 2019 | Approximate computing design exploration through data lifetime metrics. | Alessandro Savino, Michele Portolan, Rgis Leveugle, Stefano Di Carlo |
| 2019 | Impact of Reduced Precision in the Reliability of Deep Neural Networks for Object Detection. | Fernando Fernandes dos Santos, Philippe O. A. Navaux, Luigi Carro, Paolo Rech |
| 2019 | Back-annotation of Interconnect Physical Properties for System-Level Crosstalk Modeling. | Rezgar Sadeghi, Nooshin Nosrati, Katayoon Basharkhah, Zainalabedin Navabi |
| 2019 | Alternatives to Fault Injections for Early Safety/Security Evaluations. | Michele Portolan, Alessandro Savino, Rgis Leveugle, Stefano Di Carlo, Alberto Bosio, Giorgio Di Natale |
| 2019 | A Functional Approach to Test and Debug of IEEE 1687 Reconfigurable Networks. | Michele Portolan, Riccardo Cantoro, Ernesto Snchez |
| 2019 | PaTran: Translation Platform for Test Pattern Program. | Jung-Geun Park, Minsu Kim, Soo-Mook Moon, Sungyeol Kim, Insu Yang, Hyunsoo Jung |
| 2019 | High-Level Combined Deterministic and Pseudo-exhuastive Test Generation for RISC Processors. | Adeboye Stephen Oyeniran, Raimund Ubar, Maksim Jenihhin, Cemil Cem Grsoy, Jaan Raik |
| 2019 | LearnX: A Hybrid Deterministic-Statistical Defect Diagnosis Methodology. | Soumya Mittal, R. D. Shawn Blanton |
| 2019 | DFT Scheme for Hard-to-Detect Faults in FinFET SRAMs. | Guilherme Cardoso Medeiros, Mottaqiallah Taouil, Moritz Fieback, Leticia Bolzani Poehls, Said Hamdioui |
| 2019 | A Machine Learning-based Approach to Optimize Repair and Increase Yield of Embedded Flash Memories in Automotive Systems-on-Chip. | A. Manzini, P. Inglese, L. Caldi, R. Cantero, G. Carnevale, Matteo Coppetta, M. Giltrelli, N. Mautone, F. Irrera, Rudolf Ullmann, Paolo Bernardi |
| 2019 | A 52 dB-SFDR 166 MHz sinusoidal signal generator for mixed-signal BIST applications in 28 nm FDSOI technology. | Hani Malloug, Manuel J. Barragn, Salvador Mir |
| 2019 | STAHL: A Novel Scan-Test-Aware Hardened Latch Design. | Ruijun Ma, Stefan Holst, Xiaoqing Wen, Aibin Yan, Hui Xu |
| 2019 | Model-driven AMS Test Setup Validation Tool prepared for IEEE P1687.2. | Leon M. A. van de Logt, Vladimir A. Zivkovic, Ingrid H. A. van Baast |
| 2019 | On Generating Fault Diagnosis Patterns for Designs with X Sources. | Xijiang Lin, Sudhakar M. Reddy |
| 2019 | Revisiting Logic Locking for Reversible Computing. | Nimisha Limaye, Muhammad Yasin, Ozgur Sinanoglu |
| 2019 | Hardware-Based Aging Mitigation Scheme for Memory Address Decoder. | Daniel Kraak, Innocent Agbo, Mottaqiallah Taouil, Said Hamdioui, Pieter Weckx, Stefan Cosemans, Francky Catthoor |
| 2019 | Security in Autonomous Systems. | Stefan Katzenbeisser, Ilia Polian, Francesco Regazzoni, Marc Stttinger |
| 2019 | Test Solutions for High Density 3D-IC Interconnects - Focus on SRAM-on-Logic Partitioning. | Imed Jani, Didier Lattard, Pascal Vivet, Jean Durupt, Sbastien Thuries, Edith Beign |
| 2019 | Digital Built-in Self-Test for Phased Locked Loops to Enable Fault Detection. | Mehmet Ince, Ender Yilmaz, Wei Fu, Joonsung Park, Krishnaswamy Nagaraj, LeRoy Winemberg, Sule Ozev |
| 2019 | Exploring Algebraic Interpolants for Rectification of Finite Field Arithmetic Circuits with Grbner Bases. | Utkarsh Gupta, Priyank Kalla, Irina Ilioaea, Florian Enescu |
| 2019 | K3 TAM Optimization for Testing 3D-SoCs using Non-Regular Time-Division-Multiplexing. | Panagiotis Georgiou, Iakovos Theodosopoulos, Xrysovalantis Kavousianos |
| 2019 | Dependable Wireless Industrial IoT Networks: Recent Advances and Open Challenges. | Fotis Foukalas, Paul Pop, Fabrice Theoleyre, Carlo Alberto Boano, Chiara Buratti |
| 2019 | B-open: A New Defect in Nanometer Technologies due to SADP Process. | Freddy Forero, Michel Renovell, Vctor H. Champac |
| 2019 | Symbolic Circuit Analysis under an Arc Based Timing Model. | Grschwin Fey, Alberto Garca Ortiz |
| 2019 | Machine Learning-based Prediction of Test Power. | Harshad Dhotre, Stephan Eggersgl, Krishnendu Chakrabarty, Rolf Drechsler |
376–400 of 1,163← PreviousNext →
Comparable venues
Other A*/A conferences filed under the same field of research.
- ADATEDesign, Automation and Test in Europe Conference
- A*DACDesign Automation Conf
- ASCInternational Conference for High Performance Computing, Networking, Storage and Analysis (was Supercomputing Conference)
- AICCADIEEE/ACM International Conference on Computer-Aided Design
- AITCIEEE International Test Conference
- A*ISCAACM International Symposium on Computer Architecture
- A*MICROInternational Symposium on Microarchitecture
- AISLPEDIEEE/ACM International Symposium on Low Power Electronics and Design