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Patrick Girard

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

165

Venues

20

Active years

1992–2026

Best venue rank

A*

Where they publish

Papers

165 indexed papers, newest first.

YearVenueTitleAuthors
2026ETSExploiting Near-Memory Computing Resources for Native, Adaptive, and Low-Overhead MBIST.Sabrina Ait Belkacem, Lila Ammoura, Maria Ramirez-Corrales, Marie-Lise Flottes, Patrick Girard, Jean-Philippe Noel, Arnaud Virazel
2026VTSEnhancing Testability & Security of Near-Memory Computing Architectures.Hichem Benamara, Sabrina Ait Belkacem, Maria Ramirez-Corrales, Lorenzo Ciampolini, Jean-Philippe Noel, Maha Kooli, Lila Ammoura, Ian O'Connor, Patrick Girard, Arnaud Virazel
2026VTSPre-processing Functional And Physical Defect Equivalences To Accelerate Cell-Aware Model Generation.Reza Khoshzaban, Gianmarco Mongelli, Dorian Ronga, Iacopo Guglielminetti, Michelangelo Grosso, Eric Faehn, Patrick Girard, Arnaud Virazel, Riccardo Cantoro
2025DATEAccelerating Cell-Aware Model Generation for Sequential Cells using Graph Theory.Gianmarco Mongelli, Eric Faehn, Dylan Robins, Patrick Girard, Arnaud Virazel
2025DATENVSRLO: A FeFET-Based Non-Volatile and SEU-Recoverable Latch Design with Optimized Overhead.Aibin Yan, Wangjin Jiang, Han Bao, Zhengfeng Huang, Tianming Ni, Xiaoqing Wen, Patrick Girard
2025ETSEuropean Test Symposium Teams: an Anniversary Snapshot.Maksim Jenihhin, Jaan Raik, Artur Jutman, Natalia Cherezova, Raimund Ubar, Liviu Miclea, Szilrd Enyedi, Iulia Stefan, Ovidiu Stan, Cosmina Corches, Zebo Peng, Petru Eles, Rolf Drechsler, S. Eggersgl, Grschwin Fey, Andreas Glowatz, Daniel Tille, Georges G. E. Gielen, Anthony Coyette, Wim Dobbelaere, Ronny Vanhooren, Po-Yao Chuang, Erik Jan Marinissen, Giorgio Di Natale, M. Barragan, Paolo Maistri, S. Mir, Vatajelu I. Vatajelu, Paolo Bernardi, Stefano Di Carlo, Paolo Prinetto, Matteo Sonza Reorda, Massimo Violante, Haralampos-G. Stratigopoulos, M. K. Michael, Stelios Neophytou, Stavros Hadjitheophanous, Kyriakos Christou, M. Skitsas, Alberto Bosio, Bastien Deveautour, Patrick Girard, Marcello Traiola, Arnaud Virazel, Fernando Fernandes dos Santos, Angeliki Kritikakou, Gioele Casagranda, Marzio Vallero, Flavio Vella, Paolo Rech, Letcia Maria Bolzani Poehls, Milos Krstic, Marko S. Andjelkovic, Fabian Luis Vargas, Grigor Tshagharyan, Gurgen Harutyunyan, Valery A. Vardanian, Samvel K. Shoukourian, Yervant Zorian, Jennifer Dworak, Kundan Nepal, Theodore W. Manikas, Mottaqiallah Taouil, Moritz Fieback, Anteneh Gebregiorgis, Rajendra Bishnoi, Said Hamdioui, Abhijit Chatterjee, Anurup Saha, Suhasini Komarraju, K. Ma, Chandramouli N. Amarnath, Mehdi Baradaran Tahoori, Mahta Mayahinia, Maryam Rajabalipanah, Katayoon Basharkhah, N. Nosrati, Zahra Jahanpeima, Zain Navabi, Hans-Joachim Wunderlich, Sybille Hellebrand
2025IOLTSA Runtime Efficient Graph-Based Cell-Aware Model Generation for Structural SRAM Testing.Gianmarco Mongelli, Xhesila Xhafa, Eric Faehn, Dylan Robins, Patrick Girard, Arnaud Virazel
2025IOLTSA Digital SRAM Modeling for Cell-Aware Testing and Test Algorithms Evaluation.Dorian Ronga, Xhesila Xhafa, Eric Faehn, Patrick Girard, T. Vayssade, Arnaud Virazel
2025ISCASTNURML: Triple-Node-Upset-Recovery Magnetic Latch Design with Non-Volatility for Aerospace Applications.Aibin Yan, Zhiyuan Pei, Xing Guo, Jie Song, Cuiyun Jiang, Huaguo Liang, Xiaoqing Wen, Patrick Girard
2024DATEA Novel March Test Algorithm for Testing 8T SRAM-Based IMC Architectures.Lila Ammoura, Marie-Lise Flottes, Patrick Girard, Jean-Philippe Noel, Arnaud Virazel
2024IOLTSA Graph-Based Methodology for Speeding up Cell-Aware Model Generation.Gianmarco Mongelli, Xhesila Xhafa, Eric Faehn, Dylan Robins, Patrick Girard, Arnaud Virazel
2024ISCASNonvolatile and SEU-Recoverable Latch Based on FeFET and CMOS for Energy-Harvesting Devices.Aibin Yan, Zhuoyuan Lin, Guangzhu Liu, Qingyang Zhang, Zhengfeng Huang, Jie Cui, Xiaoqing Wen, Patrick Girard
2024ITCA Fast and Efficient Graph-Based Methodology for Cell-Aware Model Generation.Gianmarco Mongelli, Eric Faehn, Dylan Robins, Patrick Girard, Arnaud Virazel
2023DATEHigh Performance and DNU-Recovery Spintronic Retention Latch for Hybrid MTJ/CMOS Technology.Aibin Yan, Zhen Zhou, Liang Ding, Jie Cui, Zhengfeng Huang, Xiaoqing Wen, Patrick Girard
2023ETSIntra-cell Resistive-Open Defect Analysis on a Foundry 8T SRAM-based IMC Architecture.Lila Ammoura, Marie-Lise Flottes, Patrick Girard, Jean-Philippe Noel, Arnaud Virazel
2023ETSLearning-Based Characterization Models for Quality Assurance of Emerging Memory Technologies.Xhesila Xhafa, Patrick Girard, Arnaud Virazel
2023ETSOn Using Cell-Aware Methodology for SRAM Bit Cell Testing.Xhesila Xhafa, Aymen Ladhar, Eric Faehn, Lorena Anghel, Gregory di Pendina, Patrick Girard, Arnaud Virazel
2023ISCASDesign of Low-Cost Approximate CMOS Full Adders.Aibin Yan, Shaojie Wei, Zhixing Li, Jie Cui, Zhengfeng Huang, Patrick Girard, Xiaoqing Wen
2023ITCPredictor BIST: An "All-in-One" Optical Test Solution for CMOS Image Sensors.Julia Lefevre, P. Debaud, Patrick Girard, Arnaud Virazel
2022DATESCLCRL: Shuttling C-elements based Low-Cost and Robust Latch Design Protected against Triple Node Upsets in Harsh Radiation Environments.Aibin Yan, Zhixing Li, Shiwei Huang, Zijie Zhai, Xiangyu Cheng, Jie Cui, Tianming Ni, Xiaoqing Wen, Patrick Girard
2022ETSEffective techniques for automatically improving the transition delay fault coverage of Self-Test Libraries.Riccardo Cantoro, Francesco Garau, Patrick Girard, Nima Kolahimahmoudi, Sandro Sartoni, Matteo Sonza Reorda, Arnaud Virazel
2022ETSA Generic Fast and Low Cost BIST Solution for CMOS Image Sensors.Julia Lefevre, P. Debaud, Patrick Girard, Arnaud Virazel
2022ITCA Comprehensive Learning-Based Flow for Cell-Aware Model Generation.P. D'Hondt, Aymen Ladhar, Patrick Girard, Arnaud Virazel
2022VTSA Highly Reliable and Low Power RHBD Flip-Flop Cell for Aerospace Applications.Aibin Yan, Kuikui Qian, Jie Cui, Ningning Cui, Zhengfeng Huang, Xiaoqing Wen, Patrick Girard
2021DATEA Learning-Based Methodology for Accelerating Cell-Aware Model Generation.P. D'Hondt, Aymen Ladhar, Patrick Girard, Arnaud Virazel
2021ETSEmerging Computing Devices: Challenges and Opportunities for Test and ReliabilityAlberto Bosio, Ian O'Connor, Marcello Traiola, Jorge Echavarria, Jrgen Teich, Muhammad Abdullah Hanif, Muhammad Shafique, Said Hamdioui, Bastien Deveautour, Patrick Girard, Arnaud Virazel, Koen Bertels
2021ETSDesign of Fault-Tolerant and Thermally Stable XOR Gate in Quantum dot Cellular Automata.Syed Farah Naz, Ambika Prasad Shah, Suhaib Ahmed, Patrick Girard, Michael Waltl
2021IOLTSSelf-Test Libraries Analysis for Pipelined Processors Transition Fault Coverage Improvement.Riccardo Cantoro, Patrick Girard, Riccardo Masante, Sandro Sartoni, Matteo Sonza Reorda, Arnaud Virazel
2021IOLTSReducing Overprovision of Triple Modular Reduncancy Owing to Approximate Computing.Bastien Deveautour, Marcello Traiola, Arnaud Virazel, Patrick Girard
2021ITCA Fast and Low Cost Embedded Test Solution for CMOS Image Sensors.Julia Lefevre, Philippe Debaud, Patrick Girard, Arnaud Virazel
2021MEDITowards a Model-Based Approach to Support Physical Test Process of Aircraft Hydraulic Systems.Ouissem Mesli-Kesraoui, Yassine Ouhammou, Olga Goubali, Pascal Berruet, Patrick Girard, Emmanuel Grolleau
2020DACHITTSFL: Design of a Cost-Effective HIS-Insensitive TNU-Tolerant and SET-Filterable Latch for Safety-Critical Applications.Aibin Yan, Xiangfeng Feng, Xiaohu Zhao, Hang Zhou, Jie Cui, Zuobin Ying, Patrick Girard, Xiaoqing Wen
2020DATEMaximizing Yield for Approximate Integrated Circuits.Marcello Traiola, Arnaud Virazel, Patrick Girard, Mario Barbareschi, Alberto Bosio
2020ETSDesign, Verification, Test and In-Field Implications of Approximate Computing Systems.Alberto Bosio, Stefano Di Carlo, Patrick Girard, Ernesto Snchez, Alessandro Savino, Luks Sekanina, Marcello Traiola, Zdenek Vascek, Arnaud Virazel
2020ETSQAMR: an Approximation-Based Fully Reliable TMR Alternative for Area Overhead Reduction.Bastien Deveautour, Marcello Traiola, Arnaud Virazel, Patrick Girard
2020ETSLearning-Based Cell-Aware Defect Diagnosis of Customer Returns.Safa Mhamdi, Patrick Girard, Arnaud Virazel, Alberto Bosio, Aymen Ladhar
2020IOLTSDevelopment and Application of Embedded Test Instruments to Digital, Analog/RFs and Secure ICs.Florence Azas, Serge Bernard, Mariane Comte, Bastien Deveautour, Sophie Dupuis, Hassan El Badawi, Marie-Lise Flottes, Patrick Girard, Vincent Kerzrho, Laurent Latorre, Franois Lefvre, Bruno Rouzeyre, Emanuele Valea, T. Vayssade, Arnaud Virazel
2020IOLTSAn ECC-Based Repair Approach with an Offset-Repair CAM for Mitigating the MBUs Affecting Repair CAM.Panagiota Papavramidou, Michael Nicolaidis, Patrick Girard
2020IOLTSImpact of Aging on Soft Error Susceptibility in CMOS Circuits.Ambika Prasad Shah, Patrick Girard
2020IOLTSA CMOS OxRAM-Based Neuron Circuit Hardened with Enclosed Layout Transistors for Aerospace Applications.Pablo Ilha Vaz, Patrick Girard, Arnaud Virazel, Hassen Aziza
2020ISCASDual-Interlocked-Storage-Cell-Based Double-Node-Upset Self-Recoverable Flip-Flop Design for Safety-Critical Applications.Aibin Yan, Zhelong Xu, Jie Cui, Zuobin Ying, Zhengfeng Huang, Huaguo Liang, Patrick Girard, Xiaoqing Wen
2020ITCA Learning-Based Cell-Aware Diagnosis Flow for Industrial Customer Returns.Safa Mhamdi, Patrick Girard, Arnaud Virazel, Alberto Bosio, Aymen Ladhar
2019HCIEnd User Designing of Complex Task Models for Complex Control-Command Systems.Olga Goubali, Patrick Girard, Laurent Guittet, Alain Bignon, Djamal Kesraoui, Soraya Kesraoui-Mesli, Pascal Berruet, Benjamin Morio, Laurianne Boulhic
2019IOLTSTowards Improvement of Mission Mode Failure Diagnosis for System-on-Chip.Safa Mhamdi, Arnaud Virazel, Patrick Girard, Alberto Bosio, Etienne Auvray, Eric Faehn, Aymen Ladhar
2018DDECSOn the Comparison of Different ATPG Approaches for Approximate Integrated Circuits.Marcello Traiola, Arnaud Virazel, Patrick Girard, Mario Barbareschi, Alberto Bosio
2018HCIExample Based Programming and Ontology Building: A Bioinformatic Application.Quentin Rich-Piotaix, Patrick Girard, Frdric Bilan, Ladjel Bellatreche
2018ITCAn Effective Intra-Cell Diagnosis Flow for Industrial SRAMs.Tien-Phu Ho, Eric Faehn, Arnaud Virazel, Alberto Bosio, Patrick Girard
2017DDECSTowards approximation during test of Integrated Circuits.Imran Wali, Marcello Traiola, Arnaud Virazel, Patrick Girard, Mario Barbareschi, Alberto Bosio
2016DDECSA hybrid power modeling approach to enhance high-level power models.Alejandro Nocua, Arnaud Virazel, Alberto Bosio, Patrick Girard, Cyril Chevalier
2016DDECSAn effective approach for functional test programs compaction.Aymen Touati, Alberto Bosio, Patrick Girard, Arnaud Virazel, Paolo Bernardi, Matteo Sonza Reorda
2016ETSA low-cost susceptibility analysis methodology to selectively harden logic circuits.Imran Wali, Bastien Deveautour, Arnaud Virazel, Alberto Bosio, Patrick Girard, Matteo Sonza Reorda
2016HCIDesigning Functional Specifications for Complex Systems.Olga Goubali, Patrick Girard, Laurent Guittet, Alain Bignon, Djamal Kesraoui, Pascal Berruet, Jean-Frdric Bouillon
2016HCIAvoiding Inaccuracies in Task Models.Thomas Lachaume, Patrick Girard, Laurent Guittet, Allan Fousse
2015DATEExploring the impact of functional test programs re-used for power-aware testing.Aymen Touati, Alberto Bosio, Luigi Dilillo, Patrick Girard, Arnaud Virazel, Paolo Bernardi, Matteo Sonza Reorda
2015DDECSDesign-for-Diagnosis Architecture for Power Switches.Miroslav Valka, Alberto Bosio, Luigi Dilillo, Patrick Girard, Arnaud Virazel, P. Debaud, S. Guilhot
2015ETSAn effective hybrid fault-tolerant architecture for pipelined cores.Imran Wali, Arnaud Virazel, Alberto Bosio, Luigi Dilillo, Patrick Girard
2015IOLTSDesign space exploration and optimization of a Hybrid Fault-Tolerant Architecture.Imran Wali, Arnaud Virazel, Alberto Bosio, Patrick Girard, Matteo Sonza Reorda
2014ASPDACPower supply noise-aware workload assignments for homogeneous 3D MPSoCs with thermal consideration.Yuanqing Cheng, Aida Todri-Sanial, Alberto Bosio, Luigi Dilillo, Patrick Girard, Arnaud Virazel
2014DDECSPath delay test in the presence of multi-aggressor crosstalk, power supply noise and ground bounce.Anu Asokan, Aida Todri-Sanial, Alberto Bosio, Luigi Dilillo, Patrick Girard, Serge Pravossoudovitch, Arnaud Virazel
2014DDECSAn intra-cell defect grading tool.Alberto Bosio, Luigi Dilillo, Patrick Girard, Aida Todri-Sanial, Arnaud Virazel, S. Bernabovi, Paolo Bernardi
2014DDECSTiming-aware ATPG for critical paths with multiple TSVs.Carolina Metzler, Aida Todri-Sanial, Alberto Bosio, Luigi Dilillo, Patrick Girard, Arnaud Virazel
2014DDECSTest and diagnosis of power switches.Miroslav Valka, Alberto Bosio, Luigi Dilillo, Aida Todri, Arnaud Virazel, Patrick Girard, P. Debaud, S. Guilhot
2014DDECSProtecting combinational logic in pipelined microprocessor cores against transient and permanent faults.Imran Wali, Arnaud Virazel, Alberto Bosio, Luigi Dilillo, Patrick Girard, Aida Todri
2014ETSiBoX - Jitter based Power Supply Noise sensor.Miroslav Valka, Alberto Bosio, Luigi Dilillo, Aida Todri, Arnaud Virazel, Patrick Girard, P. Debaud, S. Guilhot
2014VTSTSV aware timing analysis and diagnosis in paths with multiple TSVs.Carolina Metzler, Aida Todri-Sanial, Alberto Bosio, Luigi Dilillo, Patrick Girard, Arnaud Virazel
2013DATETest solution for data retention faults in low-power SRAMs.Leonardo Bonet Zordan, Alberto Bosio, Luigi Dilillo, Patrick Girard, Aida Todri, Arnaud Virazel, Nabil Badereddine
2013ETSComputing detection probability of delay defects in signal line tsvs.Carolina Metzler, Aida Todri-Sanial, Alberto Bosio, Luigi Dilillo, Patrick Girard, Arnaud Virazel, Pascal Vivet, Marc Belleville
2013ETSAnalyzing resistive-open defects in SRAM core-cell under the effect of process variability.Elena I. Vatajelu, Alberto Bosio, Luigi Dilillo, Patrick Girard, Aida Todri, Arnaud Virazel, Nabil Badereddine
2013IOLTSSRAM soft error rate evaluation under atmospheric neutron radiation and PVT variations.Georgios Tsiligiannis, Elena I. Vatajelu, Luigi Dilillo, Alberto Bosio, Patrick Girard, Serge Pravossoudovitch, Aida Todri, Arnaud Virazel, Frederic Wrobel, Frdric Saign
2013ITCOn the reuse of read and write assist circuits to improve test efficiency in low-power SRAMs.Leonardo Bonet Zordan, Alberto Bosio, Luigi Dilillo, Patrick Girard, Aida Todri, Arnaud Virazel, Nabil Badereddine
2013VTSA built-in scheme for testing and repairing voltage regulators of low-power srams.Leonardo Bonet Zordan, Alberto Bosio, Luigi Dilillo, Patrick Girard, Aida Todri, Arnaud Virazel, Nabil Badereddine
2013TARKFacebook and the epistemic logic of friendship.Jeremy Seligman, Fenrong Liu, Patrick Girard
2012AiMLGeneral Dynamic Dynamic Logic.Patrick Girard, Jeremy Seligman, Fenrong Liu
2012DATEImpact of resistive-open defects on the heat current of TAS-MRAM architectures.Joao Azevedo, Arnaud Virazel, Alberto Bosio, Luigi Dilillo, Patrick Girard, Aida Todri-Sanial, Guillaume Prenat, Jrmy Alvarez-Herault, Ken Mackay
2012ETSCoupling-based resistive-open defects in TAS-MRAM architectures.Joao Azevedo, Arnaud Virazel, Alberto Bosio, Luigi Dilillo, Patrick Girard, Aida Todri, Guillaume Prenat, Jrmy Alvarez-Herault, Ken Mackay
2012ETSThrough-Silicon-Via resistive-open defect analysis.Carolina Metzler, Aida Todri, Alberto Bosio, Luigi Dilillo, Patrick Girard, Arnaud Virazel
2012ETSDefect analysis in power mode control logic of low-power SRAMs.Leonardo Bonet Zordan, Alberto Bosio, Luigi Dilillo, Patrick Girard, Aida Todri, Arnaud Virazel, Nabil Badereddine
2012IOLTSEvaluation of test algorithms stress effect on SRAMs under neutron radiation.Georgios Tsiligiannis, Luigi Dilillo, Alberto Bosio, Patrick Girard, Aida Todri, Arnaud Virazel, Antoine D. Touboul, Frederic Wrobel, Frdric Saign
2012ITCOn pinpoint capture power management in at-speed scan test generation.Xiaoqing Wen, Y. Nishida, Kohei Miyase, Seiji Kajihara, Patrick Girard, Mohammad Tehranipoor, Laung-Terng Wang
2012ITCLow-power SRAMs power mode control logic: Failure analysis and test solutions.Leonardo Bonet Zordan, Alberto Bosio, Luigi Dilillo, Patrick Girard, Aida Todri, Arnaud Virazel, Nabil Badereddine
2012VTSAdvanced test methods for SRAMs.Alberto Bosio, Luigi Dilillo, Patrick Girard, Serge Pravossoudovitch, Arnaud Virazel
2012VTSA pseudo-dynamic comparator for error detection in fault tolerant architectures.D. A. Tran, Arnaud Virazel, Alberto Bosio, Luigi Dilillo, Patrick Girard, Aida Todri, Michael E. Imhof, Hans-Joachim Wunderlich
2011DDECSOn using a SPICE-like TSTAC™ eFlash model for design and test.Pierre-Didier Mauroux, Arnaud Virazel, Alberto Bosio, Luigi Dilillo, Patrick Girard, Serge Pravossoudovitch, Benot Godard, Gilles Festes, Laurent Vachez
2011DDECSA study of path delay variations in the presence of uncorrelated power and ground supply noise.Aida Todri, Alberto Bosio, Luigi Dilillo, Patrick Girard, Serge Pravossoudovitch, Arnaud Virazel
2011DDECSOptimized march test flow for detecting memory faults in SRAM devices under bit line coupling.Leonardo Bonet Zordan, Alberto Bosio, Luigi Dilillo, Patrick Girard, Serge Pravossoudovitch, Arnaud Virazel, Nabil Badereddine
2011ETSA Functional Power Evaluation Flow for Defining Test Power Limits during At-Speed Delay Testing.Miroslav Valka, Alberto Bosio, Luigi Dilillo, Patrick Girard, Serge Pravossoudovitch, Arnaud Virazel, Ernesto Snchez, Mauricio de Carvalho, Matteo Sonza Reorda
2011ITCOn using address scrambling to implement defect tolerance in SRAMs.Renan Alves Fonseca, Luigi Dilillo, Alberto Bosio, Patrick Girard, Serge Pravossoudovitch, Arnaud Virazel, Nabil Badereddine
2011VTSPower-aware test generation with guaranteed launch safety for at-speed scan testing.Xiaoqing Wen, Kazunari Enokimoto, Kohei Miyase, Yuta Yamato, Michael A. Kochte, Seiji Kajihara, Patrick Girard, Mohammad Tehranipoor
2010DACA statistical simulation method for reliability analysis of SRAM core-cells.Renan Alves Fonseca, Luigi Dilillo, Alberto Bosio, Patrick Girard, Serge Pravossoudovitch, Arnaud Virazel, Nabil Badereddine
2010DDECSAnalysis of power consumption and transition fault coverage for LOS and LOC testing schemes.Fangmei Wu, Luigi Dilillo, Alberto Bosio, Patrick Girard, Serge Pravossoudovitch, Arnaud Virazel, Junxia Ma, Wei Zhao, Mohammad Tehranipoor, Xiaoqing Wen
2010ETSAnalysis of resistive-bridging defects in SRAM core-cells: A comparative study from 90nm down to 40nm technology nodes.Renan Alves Fonseca, Luigi Dilillo, Alberto Bosio, Patrick Girard, Serge Pravossoudovitch, Arnaud Virazel, Nabil Badereddine
2010ETSSetting test conditions for improving SRAM reliability.Renan Alves Fonseca, Luigi Dilillo, Alberto Bosio, Patrick Girard, Serge Pravossoudovitch, Arnaud Virazel, Nabil Badereddine
2010ETSA two-layer SPICE model of the ATMEL TSTACPierre-Didier Mauroux, Arnaud Virazel, Alberto Bosio, Luigi Dilillo, Patrick Girard, Serge Pravossoudovitch, Benot Godard, Gilles Festes, Laurent Vachez
2010ITCA roaming memory test bench for detecting particle induced SEUs.Jean-Marc Gallire, Paolo Rech, Patrick Girard, Luigi Dilillo
2010ITCParity prediction synthesis for nano-electronic gate designs.D. A. Tran, Arnaud Virazel, Alberto Bosio, Luigi Dilillo, Patrick Girard, Serge Pravossoudovitch, Hans-Joachim Wunderlich
2010ITCIs test power reduction through X-filling good enough?Fangmei Wu, Luigi Dilillo, Alberto Bosio, Patrick Girard, Serge Pravossoudovitch, Arnaud Virazel, Mohammad Tehranipoor, Kohei Miyase, Xiaoqing Wen, Nisar Ahmed
2010VTSDetecting NBTI induced failures in SRAM core-cells.Renan Alves Fonseca, Luigi Dilillo, Alberto Bosio, Patrick Girard, Serge Pravossoudovitch, Arnaud Virazel, Nabil Badereddine
2009DATEA new design-for-test technique for SRAM core-cell stability faults.Alexandre Ney, Luigi Dilillo, Patrick Girard, Serge Pravossoudovitch, Arnaud Virazel, Magali Bastian, Vincent Gouin
2009DDECSComprehensive bridging fault diagnosis based on the SLAT paradigm.Youssef Benabboud, Alberto Bosio, Luigi Dilillo, Patrick Girard, Serge Pravossoudovitch, Arnaud Virazel, Laroussi Bouzaida, Isabelle Izaute
2009DDECSAn efficient fault simulation technique for transition faults in non-scan sequential circuits.Alberto Bosio, Patrick Girard, Serge Pravossoudovitch, Paolo Bernardi, Matteo Sonza Reorda
2009HCIHierarchical Structure: A Step for Jointly Designing Interactive Software Dialog and Task Model.Sybille Caffiau, Patrick Girard, Laurent Guittet, Dominique L. Scapin
2009HCIAgent-Based Architecture for Interactive System Design: Current Approaches, Perspectives and Evaluation.Christophe Kolski, Peter Forbrig, Bertrand David, Patrick Girard, Chi Dung Tran, Houcine Ezzedine
2009ITCNAND flash testing: A preliminary study on actual defects.Pierre-Didier Mauroux, Arnaud Virazel, Alberto Bosio, Luigi Dilillo, Patrick Girard, Serge Pravossoudovitch, Benot Godard
2008DATEPower-Aware Testing and Test Strategies for Low Power Devices.Dimitris Gizopoulos, Kaushik Roy, Patrick Girard, Nicola Nicolici, Xiaoqing Wen
2008DATEA Design-for-Diagnosis Technique for SRAM Write Drivers.Alexandre Ney, Patrick Girard, Serge Pravossoudovitch, Arnaud Virazel, Magali Bastian, Vincent Gouin
2008DDECSSoC Symbolic Simulation: a case study on delay fault testing.Alberto Bosio, Patrick Girard, Serge Pravossoudovitch, Paolo Bernardi
2008ICINCOEnergy Model based Control for Forming Processes.Patrick Girard, Vincent Thomson
2008IOLTSYield Improvement, Fault-Tolerance to the Rescue?.Julien Vial, Alberto Bosio, Patrick Girard, Christian Landrault, Serge Pravossoudovitch, Arnaud Virazel
2008ITCA History-Based Diagnosis Technique for Static and Dynamic Faults in SRAMs.Alexandre Ney, Alberto Bosio, Luigi Dilillo, Patrick Girard, Serge Pravossoudovitch, Arnaud Virazel, Magali Bastian
2008ITCSoC Yield Improvement: Redundant Architectures to the Rescue?Julien Vial, Alberto Bosio, Patrick Girard, Christian Landrault, Serge Pravossoudovitch, Arnaud Virazel
2008VTSAn SRAM Design-for-Diagnosis Solution Based on Write Driver Voltage Sensing.Alexandre Ney, Patrick Girard, Serge Pravossoudovitch, Arnaud Virazel, Magali Bastian, Vincent Gouin
2007DATESlow write driver faults in 65nm SRAM technology: analysis and March test solution.Alexandre Ney, Patrick Girard, Christian Landrault, Serge Pravossoudovitch, Arnaud Virazel, Magali Bastian
2007DDECSA Mixed Approach for Unified Logic Diagnosis.Alexandre Rousset, Alberto Bosio, Patrick Girard, Christian Landrault, Serge Pravossoudovitch, Arnaud Virazel
2007ETSElectrical Simulation Model of the 2T-FLOTOX Core-Cell for Defect Injection and Faulty Behavior Prediction in eFlash Memories.Olivier Ginez, Jean Michel Daga, Patrick Girard, Christian Landrault, Serge Pravossoudovitch, Arnaud Virazel
2007ETSDynamic Two-Cell Incorrect Read Fault Due to Resistive-Open Defects in the Sense Amplifiers of SRAMs.Alexandre Ney, Patrick Girard, Christian Landrault, Serge Pravossoudovitch, Arnaud Virazel, Magali Bastian
2007ETSDERRIC: A Tool for Unified Logic Diagnosis.Alexandre Rousset, Alberto Bosio, Patrick Girard, Christian Landrault, Serge Pravossoudovitch, Arnaud Virazel
2007ITCA concurrent approach for testing address decoder faults in eFlash memories.Olivier Ginez, Patrick Girard, Christian Landrault, Serge Pravossoudovitch, Arnaud Virazel, Jean Michel Daga
2007ITCA novel scheme to reduce power supply noise for high-quality at-speed scan testing.Xiaoqing Wen, Kohei Miyase, Seiji Kajihara, Tatsuya Suzuki, Yuta Yamato, Patrick Girard, Yuji Ohsumi, Laung-Terng Wang
2007VTSRetention and Reliability Problems in Embedded Flash Memories: Analysis and Test of Defective 2T-FLOTOX Tunnel Window.Olivier Ginez, Jean Michel Daga, Patrick Girard, Christian Landrault, Serge Pravossoudovitch, Arnaud Virazel
2007VTSUn-Restored Destructive Write Faults Due to Resistive-Open Defects in the Write Driver of SRAMs.Alexandre Ney, Patrick Girard, Christian Landrault, Serge Pravossoudovitch, Arnaud Virazel, Magali Bastian
2006DATEMinimizing test power in SRAM through reduction of pre-charge activity.Luigi Dilillo, Paul M. Rosinger, Bashir M. Al-Hashimi, Patrick Girard
2006DDECSMarch Pre: an Efficient Test for Resistive-Open Defects in the SRAM Pre-charge Circuit.Luigi Dilillo, Patrick Girard, Serge Pravossoudovitch, Arnaud Virazel, Magali Bastian
2006VTSAn Overview of Failure Mechanisms in Embedded Flash Memories.Olivier Ginez, Jean Michel Daga, Marylene Combe, Patrick Girard, Christian Landrault, Serge Pravossoudovitch, Arnaud Virazel
2005DACResistive-open defect injection in SRAM core-cell: analysis and comparison between 0.13 m and 90 nm technologies.Luigi Dilillo, Patrick Girard, Serge Pravossoudovitch, Arnaud Virazel, Magali Bastian
2005ETSResistive-open defect influence in SRAM pre-charge circuits: analysis and characterization.Luigi Dilillo, Patrick Girard, Serge Pravossoudovitch, Arnaud Virazel, Magali Bastian Hage-Hassan
2005VTSData Retention Fault in SRAM Memories: Analysis and Detection Procedures.Luigi Dilillo, Patrick Girard, Serge Pravossoudovitch, Arnaud Virazel, Magali Bastian Hage-Hassan
2004AVIExample-based programming: a pertinent visual approach for learning to program.Nicolas Guibert, Patrick Girard, Laurent Guittet
2004DATEDesign of Routing-Constrained Low Power Scan Chains.Yannick Bonhomme, Patrick Girard, Los Guiller, Christian Landrault, Serge Pravossoudovitch, Arnaud Virazel
2004ETSAn efficient scan tree design for test time reduction.Yannick Bonhomme, Tomokazu Yoneda, Hideo Fujiwara, Patrick Girard
2004ETSDynamic read destructive fault in embedded-SRAMs: analysis and march test solution.Luigi Dilillo, Patrick Girard, Serge Pravossoudovitch, Arnaud Virazel, Simone Borri, Magali Bastian Hage-Hassan
2004ETSManufacturing-oriented testing of delay faults in the logic architecture of symmetrical FPGAs.Patrick Girard, Olivier Hron, Serge Pravossoudovitch, Michel Renovell
2004IOLTSBIST of Delay Faults in the Logic Architecture of Symmetrical FPGAs.Patrick Girard, Olivier Hron, Serge Pravossoudovitch, Michel Renovell
2004IUISUIDT: safe user interface design tool.Mickal Baron, Patrick Girard
2004SMCAn agent based architecture for model based control.Benoit Boulet, Robert DiRaddo, Patrick Girard, Vincent Thomson
2004VTSMarch iC-: An Improved Version of March C- for ADOFs Detection.Luigi Dilillo, Patrick Girard, Serge Pravossoudovitch, Arnaud Virazel, Simone Borri
2003ETSDefect-oriented dynamic fault models for embedded-SRAMs.Simone Borri, Magali Hage-Hassan, Patrick Girard, Serge Pravossoudovitch, Arnaud Virazel
2003ETSRequirements for delay testing of look-up tables in SRAM-based FPGAs.Patrick Girard, Olivier Hron, Serge Pravossoudovitch, Michel Renovell
2003IOLTSDefect Analysis for Delay-Fault BIST in FPGAs.Patrick Girard, Olivier Hron, Serge Pravossoudovitch, Michel Renovell
2003ITCEfficient Scan Chain Design for Power Minimization During Scan Testing Under Routing Constraint.Yannick Bonhomme, Patrick Girard, Los Guiller, Christian Landrault, Serge Pravossoudovitch
2002ITCPower Driven Chaining of Flip-Flops in Scan Architectures.Yannick Bonhomme, Patrick Girard, Christian Landrault, Serge Pravossoudovitch
2002VTSOn Using Efficient Test Sequences for BIST.Ren David, Patrick Girard, Christian Landrault, Serge Pravossoudovitch, Arnaud Virazel
2001ETSOn hardware generation of random single input change test sequences.Ren David, Patrick Girard, Christian Landrault, Serge Pravossoudovitch, Arnaud Virazel
2001HCIThe dialog tool set: a new way to create the dialog component.Guillaume Texier, Laurent Guittet, Patrick Girard
2001IOLTSA Gated Clock Scheme for Low Power Scan-Based BIST.Yannick Bonhomme, Patrick Girard, Los Guiller, Christian Landrault, Serge Pravossoudovitch
2001VTSA Modified Clock Scheme for a Low Power BIST Test Pattern Generator.Patrick Girard, Los Guiller, Christian Landrault, Serge Pravossoudovitch, Hans-Joachim Wunderlich
2000ETSDelay fault testing: choosing between random SIC and random MIC test sequences.Arnaud Virazel, Ren David, Patrick Girard, Christian Landrault, Serge Pravossoudovitch
2000IOLTSComparison between Random and Pseudo-Random Generation for BIST of Delay, Stuck-at and Bridging Faults.Patrick Girard, Christian Landrault, Serge Pravossoudovitch, Arnaud Virazel
2000ITCLow power BIST design by hypergraph partitioning: methodology and architectures.Patrick Girard, Christian Landrault, Los Guiller, Serge Pravossoudovitch
2000VTSHidden Markov and Independence Models with Patterns for Sequential BIST.Laurent Brhlin, Olivier Gascuel, Gilles Caraux, Patrick Girard, Christian Landrault
1999ETSOn calculating efficient LFSR seeds for built-in self test.Christophe Fagot, Olivier Gascuel, Patrick Girard, Christian Landrault
1999ETSLow power BIST by filtering non-detecting vectors.Salvador Manich, A. Gabarr, M. Lopez, Joan Figueras, Patrick Girard, Los Guiller, Christian Landrault, Serge Pravossoudovitch, Joo Paulo Teixeira, Marcelino B. Santos
1999ISCASLow-energy BIST design: impact of the LFSR TPG parameters on the weighted switching activity.Patrick Girard, Los Guiller, Christian Landrault, Serge Pravossoudovitch, Joan Figueras, Salvador Manich, Joo Paulo Teixeira, Marcelino B. Santos
1999VTSA Test Vector Inhibiting Technique for Low Energy BIST Design.Patrick Girard, Los Guiller, Christian Landrault, Serge Pravossoudovitch
1997ISLPEDA gate resizing technique for high reduction in power consumption.Patrick Girard, Christian Landrault, Serge Pravossoudovitch, D. Severac
1997ITCOn Using Machine Learning for Logic BIST.Christophe Fagot, Patrick Girard, Christian Landrault
1997VTSAn optimized BIST test pattern generator for delay testing.Patrick Girard, Christian Landrault, V. Moreda, Serge Pravossoudovitch
1996DATEDFSIM: A Gate-Delay Fault Simulator for Sequential Circuits.P. Cavallera, Patrick Girard, Christian Landrault, Serge Pravossoudovitch
1996ITCA Diagnostic ATPG for Delay Faults Based on Genetic Algorithms.Patrick Girard, Christian Landrault, Serge Pravossoudovitch, B. Rodriguez
1996VTSA new test pattern generation method for delay fault testing.S. Cremoux, Christophe Fagot, Patrick Girard, Christian Landrault, Serge Pravossoudovitch
1995DATEA trace-based method for delay fault diagnosis in synchronous sequential circuits.Patrick Girard, Christian Landrault, Serge Pravossoudovitch, B. Rodriguez
1995SEKEFormal Specification and Metaprogramming in the EXPRESS Language.Yamine At Ameur, Frederic Besnard, Patrick Girard, Guy Pierra, Jean-Claude Potier
1995VTSDiagnostic of path and gate delay faults in non-scan sequential circuits.Patrick Girard, Christian Landrault, Serge Pravossoudovitch, B. Rodriguez
1993ITCAn Implicit Delay-Fault Simulation Method with Approximate Detection Threshold Calculation.D. Dumas, Patrick Girard, Christian Landrault, Serge Pravossoudovitch
1992DACA Novel Approach to Delay-Fault Diagnosis.Patrick Girard, Christian Landrault, Serge Pravossoudovitch
1992VLSIDA New Reliable Method for Delay-Fault Diagnosis.Marie-Lise Flottes, Patrick Girard, Christian Landrault, Serge Pravossoudovitch