Skip to content

IEEE European Test Symposium

ETS

B

CORE rank

CORE rank (raw)

B

Fields of research

Computer Systems Engineering

Papers indexed

1,163

1999–2026

Papers per year

199968 peak2026

ETS papers

1,163 records sourced from DBLP. Search titles, filter by year, sort by recency.

YearTitleAuthors
2017Volume diagnosis data mining.Wu-Tung Cheng, Yue Tian, Sudhakar M. Reddy
2017Rout3D: A lightweight adaptive routing algorithm for tolerating faulty vertical links in 3D-NoCs.Amir Charif, Nacer-Eddine Zergainoh, Alexandre Coelho, Michael Nicolaidis
2017A built-in self-test scheme for classifying refresh periods of DRAMs.Chia-Ming Chang, Yong-Xiao Chen, Jin-Fu Li
2017Real-time self-learning for control law adaptation in nonlinear systems using encoded check states.Suvadeep Banerjee, Abhijit Chatterjee
2017Automated area and coverage optimization of minimal latency checkers.Siavoosh Payandeh Azad, Behrad Niazmand, Apneet Kaur Sandhu, Jaan Raik, Gert Jervan, Thomas Hollstein
2017Security and trust in the analog/mixed-signal/RF domain: A survey and a perspective.Angelos Antonopoulos, Christiana Kapatsori, Yiorgos Makris
2017An efficient test technique to prevent scan-based side-channel attacks.Satyadev Ahlawat, Darshit Vaghani, Virendra Singh
2017Derivation of the reliability metric for digital circuits.Mohamed A. Abufalgha, Alex Bystrov
2017Best paper.Bernd Becker, Adit D. Singh
2016Compressor design for silicon debug.Jing Zhang, Lars-Johan Fritz, Liang Liu, Erik Larsson
2016A self-reconfiguring IEEE 1687 network for fault monitoring.Farrokh Ghani Zadegan, Dimitar Nikolov, Erik Larsson
2016Testing of small delay faults in a clock network.Shaofu Yang, Shi-Yu Huang, Kun-Han Tsai, Wu-Tung Cheng
2016ETS 2015 best paper.Hans-Joachim Wunderlich, Peter C. Maxwell
2016A built-in method for measuring the delay of TSVs in 3D ICs.Han-Yu Wu, Yong-Xiao Chen, Jin-Fu Li
2016Is IoT coming to the rescue of semiconductor?Cheng-Wen Wu
2016A fast sweep-line-based failure pattern extractor for memory diagnosis.Sin-Yu Wei, Bing-Yang Lin, Cheng-Wen Wu
2016A design-for-test solution for monolithic 3D integrated circuits.Ran Wang, Krishnendu Chakrabarty
2016A low-cost susceptibility analysis methodology to selectively harden logic circuits.Imran Wali, Bastien Deveautour, Arnaud Virazel, Alberto Bosio, Patrick Girard, Matteo Sonza Reorda
2016Study of a delayed single-event effect in the Muller C-element.Varadan Savulimedu Veeravalli, Andreas Steininger
2016Bit-flip detection-driven selection of trace signals.Amin Vali, Nicola Nicolici
2016A hybrid algorithm to conservatively check the robustness of circuits.Niels Thole, Lorena Anghel, Grschwin Fey
2016Measuring defect tolerance within mixed-signal ICs.Stephen Sunter, Alessandro Valerio, Riccardo Miglierina
2016Cell Aware and stuck-open tests.Adit D. Singh
2016Group delay filter measurement using a chirp.Peter Sarson
2016Securely connected vehicles - what it takes to make self-driving cars a reality.Lars Reger
476500 of 1,163← PreviousNext →

Comparable venues

Other A*/A conferences filed under the same field of research.