Skip to content

IEEE European Test Symposium

ETS

B

CORE rank

CORE rank (raw)

B

Fields of research

Computer Systems Engineering

Papers indexed

1,163

1999–2026

Papers per year

199968 peak2026

ETS papers

1,163 records sourced from DBLP. Search titles, filter by year, sort by recency.

YearTitleAuthors
2016Component fault localization using switching current measurements.Seetal Potluri, Satya Trinadh, Siddhant Saraf, Kamakoti Veezhinathan
2016A novel test generation and application flow for functional access to IEEE 1687 instruments.Michele Portolan
2016A scheduling method for hierarchical testability based on test environment generation results.Jun Nishimaki, Toshinori Hosokawa, Hideo Fujiwara
2016A novel threshold voltage defined switch for circuit camouflaging.Ithihasa Reddy Nirmala, Deepak Vontela, Swaroop Ghosh, Anirudh Iyengar
2016Testing in the year 2024 - big changes are coming.Phil Nigh
2016The influence of hysteresis voltage on single event transients in a 65nm CMOS high speed comparator.Illani Mohd Nawi, Basel Halak, Mark Zwolinski
2016Cross-layer resilience.Subhasish Mitra
2016Behavior and test of open-gate defects in FinFET based cells.Francisco Mesalles, Hector Villacorta, Michel Renovell, Vctor H. Champac
2016Reliability enhancement of embedded memory with combination of aging-aware adaptive in-field self-repair and ECC.Gian Mayuga, Yuta Yamato, Tomokazu Yoneda, Yasuo Sato, Michiko Inoue
2016Cell-aware diagnosis: Defective inmates exposed in their cells.Peter C. Maxwell, Friedrich Hapke, Huaxing Tang
2016IoT: Source of test challenges.Erik Jan Marinissen, Yervant Zorian, Mario Konijnenburg, Chih-Tsun Huang, Ping-Hsuan Hsieh, Peter Cockburn, Jeroen Delvaux, Vladimir Rozic, Bohan Yang, Dave Singele, Ingrid Verbauwhede, Cedric Mayor, Robert Van Rijsinge, Cocoy Reyes
2016IEEE Std P1838: DfT standard-under-development for 2.5D-, 3D-, and 5.5D-SICs.Erik Jan Marinissen, Teresa L. McLaurin, Hailong Jiao
2016Transistor stuck-on fault detection tests for digital CMOS circuits.Xijiang Lin, Sudhakar M. Reddy, Janusz Rajski
2016Questioning the reliability of Monte Carlo simulation for machine learning test validation.Gildas Lger, Manuel J. Barragn
2016Analysis of electrostatic coupling in monolithic 3D integrated circuits and its impact on delay testing.Abhishek Koneru, Krishnendu Chakrabarty
2016Formal verification of secure reconfigurable scan network infrastructure.Michael A. Kochte, Rafal Baranowski, Matthias Sauer, Bernd Becker, Hans-Joachim Wunderlich
2016Failure mechanisms and test methods for the SRAM TVC write-assist technique.Josef Kinseher, Moritz Vlker, Leonardo Bonet Zordan, Ilia Polian
2016On coverage of timing related faults at board level.Artur Jutman, Igor Aleksejev, Sergei Devadze
2016Analysis and design of an on-chip retargeting engine for IEEE 1687 networks.Ahmed Ibrahim, Hans G. Kerkhoff
2016VecTHOR: Low-cost compression architecture for IEEE 1149-compliant TAP controllers.Sebastian Huhn, Stephan Eggersgl, Rolf Drechsler
2016ETS 2016 foreword.Said Hamdioui, Giorgio Di Natale, Bram Kruseman, Maria K. Michael, Haralampos-G. D. Stratigopoulos
2016Utilizing shared memory multi-cores to speed-up the ATPG process.Stavros Hadjitheophanous, Stelios N. Neophytou, Maria K. Michael
2016CPE: Codeword Prediction Encoder.Satish Grandhi, Elsa Dupraz, Christian Spagnol, Valentin Savin, Emanuel M. Popovici
2016Linearity test of high-speed high-performance ADCs using a self-testable on-chip generator.Antonio J. Gins, Eduardo J. Peralas, Gildas Lger, Adoracin Rueda, Guillaume Renaud, Manuel J. Barragn, Salvador Mir
2016Two-dimensional time-division multiplexing for 3D-SoCs.Panagiotis Georgiou, Fotios Vartziotis, Xrysovalantis Kavousianos, Krishnendu Chakrabarty
501525 of 1,163← PreviousNext →

Comparable venues

Other A*/A conferences filed under the same field of research.