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IEEE European Test Symposium

ETS

B

CORE rank

CORE rank (raw)

B

Fields of research

Computer Systems Engineering

Papers indexed

1,163

1999–2026

Papers per year

199968 peak2026

ETS papers

1,163 records sourced from DBLP. Search titles, filter by year, sort by recency.

YearTitleAuthors
2008A Reliable Architecture for the Advanced Encryption Standard.Giorgio Di Natale, M. Doulcier, Marie-Lise Flottes, Bruno Rouzeyre
2008Function-Inherent Code Checking: A New Low Cost On-Line Testing Approach for High Performance Microprocessor Control Logic.Cecilia Metra, Daniele Rossi, Martin Omaa, Abhijit Jas, Rajesh Galivanche
2008Confidence Estimation in Non-RF to RF Correlation-Based Specification Test Compaction.Nathan Kupp, Petros Drineas, Mustapha Slamani, Yiorgos Makris
2008An Improved Algorithm to Identify the Test Stimulus in Histogram-Based A/D Converter Testing.Esa Korhonen, Juha Kostamovaara
2008Bridge Defect Diagnosis for Multiple-Voltage Design.S. Saqib Khursheed, Paul M. Rosinger, Bashir M. Al-Hashimi, Sudhakar M. Reddy, Peter Harrod
2008Temporally Extended High-Level Decision Diagrams for PSL Assertions Simulation.Maksim Jenihhin, Jaan Raik, Anton Chepurov, Raimund Ubar
2008Diagnose Multiple Stuck-at Scan Chain Faults.Yu Huang, Wu-Tung Cheng, Ruifeng Guo
2008Adaptive Debug and Diagnosis without Fault Dictionaries.Stefan Holst, Hans-Joachim Wunderlich
2008Accelerated Shift Registers for X-tolerant Test Data Compaction.Martin Hilscher, Michael Braun, Michael Richter, Andreas Leininger, Michael Gssel
2008Hierarchical Code Correction and Reliability Management in Embedded nor Flash Memories.Benot Godard, Jean Michel Daga, Lionel Torres, Gilles Sassatelli
2008Convolutional Coding for SEU mitigation.Laura Frigerio, Matteo Alan Radaelli, Fabio Salice
2008Jitter Decomposition in High-Speed Communication Systems.Qingqi Dou, Jacob A. Abraham
2008On Bypassing Blocking Bugs during Post-Silicon Validation.Ehab Anis Daoud, Nicola Nicolici
2008A Simulator of Small-Delay Faults Caused by Resistive-Open Defects.Alejandro Czutro, Nicolas Houarche, Piet Engelke, Ilia Polian, Mariane Comte, Michel Renovell, Bernd Becker
2008Bandwidth Analysis for Reusing Functional Interconnect as Test Access Mechanism.Ardy van den Berg, Pengwei Ren, Erik Jan Marinissen, Georgi Gaydadjiev, Kees Goossens
2008Self-Programmable Shared BIST for Testing Multiple Memories.Swapnil Bahl, Vishal Srivastava
2008An Innovative and Low-Cost Industrial Flow for Reliability Characterization of SoCs.Davide Appello, Paolo Bernardi, R. Cagliesi, M. Giancarlini, Michelangelo Grosso
2008Applying March Tests to K-Way Set-Associative Cache Memories.Simone Alpe, Stefano Di Carlo, Paolo Prinetto, Alessandro Savino
2008Using Temperature as Observable of the Frequency Response of RF CMOS Amplifiers.Eduardo Aldrete-Vidrio, M. Amine Salhi, Josep Altet, Stphane Grauby, Diego Mateo, H. Michel, L. Clerjaud, Jean-Michel Rampnoux, Antonio Rubio, Wilfrid Claeys, Stefan Dilhaire
2007Parallel Scan-Like Testing and Fault Diagnosis Techniques for Digital Microfluidic Biochips.Tao Xu, Krishnendu Chakrabarty
2007A Seed-Selection Method to Increase Defect Coverage for LFSR-Reseeding-Based Test Compression.Zhanglei Wang, Krishnendu Chakrabarty, Michael Bienek
2007Communication-Centric SoC Debug Using Transactions.Bart Vermeulen, Kees Goossens, Remco van Steeden, Martijn T. Bennebroek
2007Ultra Fast Parallel Fault Analysis on Structurally Synthesized BDDs.Raimund Ubar, Sergei Devadze, Jaan Raik, Artur Jutman
2007Analyzing Volume Diagnosis Results with Statistical Learning for Yield Improvement.Huaxing Tang, Manish Sharma, Janusz Rajski, Martin Keim, Brady Benware
2007Purely Digital BIST for Any PLL or DLL.Stephen K. Sunter, Aubin Roy
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