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IEEE European Test Symposium

ETS

B

CORE rank

CORE rank (raw)

B

Fields of research

Computer Systems Engineering

Papers indexed

1,163

1999–2026

Papers per year

199968 peak2026

ETS papers

1,163 records sourced from DBLP. Search titles, filter by year, sort by recency.

YearTitleAuthors
2007Static and Dynamic Analysis of SEU Effects in SRAM-Based FPGAs.Luca Sterpone, Massimo Violante
2007If It's All about Yield, Why Talk about Testing?Rene Segers
2007A Digitally Testable Capacitance-Insensitive Mixed-Signal Filter.Erik Schler, Marcelo Negreiros, Pascal Nouet, Luigi Carro
2007DERRIC: A Tool for Unified Logic Diagnosis.Alexandre Rousset, Alberto Bosio, Patrick Girard, Christian Landrault, Serge Pravossoudovitch, Arnaud Virazel
2007Test Configurations for Diagnosing Faulty Links in NoC Switches.Jaan Raik, Raimund Ubar, Vineeth Govind
2007Diagnostic Test Generation Based on Subsets of Faults.Irith Pomeranz, Sudhakar M. Reddy
2007An Integrated Built-In Test and Repair Approach for Memories with 2D Redundancy.Philipp hler, Sybille Hellebrand, Hans-Joachim Wunderlich
2007Embedded Tutorial on Low Power Test.Nicola Nicolici, Xiaoqing Wen
2007Dynamic Two-Cell Incorrect Read Fault Due to Resistive-Open Defects in the Sense Amplifiers of SRAMs.Alexandre Ney, Patrick Girard, Christian Landrault, Serge Pravossoudovitch, Arnaud Virazel, Magali Bastian
2007Digital Generation of Signals for Low Cost RF BIST.Marcelo Negreiros, Luigi Carro, Altamiro Amadeu Susin
2007Selecting Power-Optimal SBST Routines for On-Line Processor Testing.Andreas Merentitis, Nektarios Kranitis, Antonis M. Paschalis, Dimitris Gizopoulos
2007Wafer Level Reliability Screens.Peter C. Maxwell
2007Embedded Tutorial: IC Test Cost Benchmarking.Klaus Luther
2007System Level Approaches for Mitigation of Long Duration Transient Faults in Future Technologies.Carlos Arthur Lang Lisba, Marcelo Ienczczak Erigson, Luigi Carro
2007Variance Reduction for Supply Ramp Based Cheap RF Test Alternatives.Shaji Krishnan, Rene Jonker, Leon van de Logt
2007Computation and Application of Absolute Dominators in Industrial Designs.Rene Krenz-Baath, Andreas Glowatz, Jrgen Schlffel
2007FPGA Architecture for RF Transceiver System and Mixed-Signal Low Cost Tests.Ivo Koren, Frank Demmerle, Roland May, Martin Kaibel, Sebastian Sattler
2007"Analogue Network of Converters": A DFT Technique to Test a Complete Set of ADCs and DACs Embedded in a Complex SiP or SOC.Vincent Kerzerho, Philippe Cauvet, Serge Bernard, Florence Azas, Mariane Comte, Michel Renovell
2007Optimal Contexts for the Self-Test of Coarse Grain Dynamically Reconfigurable Processors.Tomoo Inoue, Takashi Fujii, Hideyuki Ichihara
2007Optimization of NoC Wrapper Design under Bandwidth and Test Time Constraints.Fawnizu Azmadi Hussin, Tomokazu Yoneda, Hideo Fujiwara
2007Adaptive Debug and Diagnosis without Fault Dictionaries.Stefan Holst, Hans-Joachim Wunderlich
2007PPM Reduction on Embedded Memories in System on Chip.Said Hamdioui, Zaid Al-Ars, Javier Jimnez, Jose Calero
2007Automatic Generation of Instructions to Robustly Test Delay Defects in Processors.Sankar Gurumurthy, Ramtilak Vemu, Jacob A. Abraham, Daniel G. Saab
2007Electrical Simulation Model of the 2T-FLOTOX Core-Cell for Defect Injection and Faulty Behavior Prediction in eFlash Memories.Olivier Ginez, Jean Michel Daga, Patrick Girard, Christian Landrault, Serge Pravossoudovitch, Arnaud Virazel
2007A Novel Approach for Online Sensor Testing Based on an Encoded Test Stimulus.Norbert Dumas, Zhou Xu, Kostas Georgopoulos, R. John T. Bunyan, Andrew Richardson
926950 of 1,163← PreviousNext →

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