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IEEE Symposium on Field Programmable Custom Computing Machines

FCCM

National

CORE rank

CORE rank (raw)

National/Regional

Fields of research

Computer Systems Engineering · Distributed Computing and Systems Software

Papers indexed

1,692

1995–2026

Papers per year

199570 peak2026

FCCM papers

1,692 records sourced from DBLP. Search titles, filter by year, sort by recency.

YearTitleAuthors
2018FPGA Side Channel Attacks without Physical Access.Chethan Ramesh, Shivukumar B. Patil, Siva Nishok Dhanuskodi, George Provelengios, Sbastien Pillement, Daniel E. Holcomb, Russell Tessier
2018Concurrency-Aware Thread Scheduling for High-Level Synthesis.Nadesh Ramanathan, George A. Constantinides, John Wickerson
2018High-Level Synthesis of FPGA Circuits with Multiple Clock Domains.Omar Ragheb, Jason Helge Anderson
2018High-Throughput Lossless Compression on Tightly Coupled CPU-FPGA Platforms.Weikang Qiao, Jieqiong Du, Zhenman Fang, Michael Lo, Mau-Chung Frank Chang, Jason Cong
2018A Bandwidth-Optimized Routing Algorithm for Hybrid FPGA Networks-on-Chip.Shivukumar B. Patil, Tianqi Liu, Russell Tessier
2018Enabling Transparent Acceleration of OpenCV Library Kernels on a Hybrid Memory Cube Computer.Md Jubaer Hossain Pantho, Joel Mandebi Mbongue, Christophe Bobda, David Andrews, Marjan Asadinia
2018Design Space Exploration for Hardware Acceleration of Machine Learning Applications in MapReduce.Katayoun Neshatpour, Hosein Mohammadi Makrani, Avesta Sasan, Hassan Ghasemzadeh, Setareh Rafatirad, Houman Homayoun
2018Rethinking Secure FPGAs: Towards a Cryptography-Friendly Configurable Cell Architecture and Its Automated Design Flow.Nele Mentens, Edoardo Charbon, Francesco Regazzoni
2018Evaluating the Performance Efficiency of a Soft-Processor, Variable-Length, Parallel-Execution-Unit Architecture for FPGAs Using the RISC-V ISA.Eric Matthews, Zavier Aguila, Lesley Shannon
2018High-Speed Regular Expression Matching with Pipelined Memory-Based Automata.Denis Matousek, Jir Matousek, Jan Korenek
2018HODS: Hardware Object Deserialization Inside SSD Storage.Dongyang Li, Fei Wu, Yang Weng, Qing Yang, Changsheng Xie
2018RapidWright: Enabling Custom Crafted Implementations for FPGAs.Chris Lavin, Alireza Kaviani
2018Accelerator Design with Effective Resource Utilization for Binary Convolutional Neural Networks on an FPGA.Sunwoong Kim, Rob A. Rutenbar
2018OpenCL-Based FPGA Design to Accelerate the Nodal Discontinuous Galerkin Method for Unstructured Meshes.Tobias Kenter, Gopinath Mahale, Samer Alhaddad, Yevgen Grynko, Christian Schmitt, Ayesha Afzal, Frank Hannig, Jens Frstner, Christian Plessl
2018Microscope on Memory: MPSoC-Enabled Computer Memory System Assessments.Abhishek Kumar Jain, G. Scott Lloyd, Maya B. Gokhale
2018LegUp-NoC: High-Level Synthesis of Loops with Indirect Addressing.Asif Islam, Nachiket Kapre
2018Efficient FPGA Implementation of Binary Field Multipliers Based on Irreducible Trinomials.Jos Luis Imaa
2018FPGA-Based Real-Time Super-Resolution System for Ultra High Definition Videos.Zhuolun He, Hanxian Huang, Ming Jiang, Yuanchao Bai, Guojie Luo
2018Inheriting Software Security Policies within Hardware IP Components.Festus Hategekimana, Joel Mandebi Mbongue, Md Jubaer Hossain Pantho, Christophe Bobda
2018EM-Aware Memory Mapping Algorithms for SRAM Based FPGA.Zhong Guan
2018Reloc - An Open-Source Vivado Workflow for Generating Relocatable End-User Configuration Tiles.Bjrn Gottschall, Thomas PreuBer, Akash Kumar
2018Demand Driven Assembly of FPGA Configurations Using Partial Reconfiguration, Ubuntu Linux, and PYNQ.Jeffrey Goeders, Tanner Gaskin, Brad L. Hutchings
2018FPDeep: Acceleration and Load Balancing of CNN Training on FPGA Clusters.Tong Geng, Tianqi Wang, Ahmed Sanaullah, Chen Yang, Rui Xu, Rushi Patel, Martin C. Herbordt
2018CAMAS: Static and Dynamic Hybrid Cache Management for CPU-FPGA Platforms.Liang Feng, Sharad Sinha, Wei Zhang, Yun Liang
2018Improved Lightweight Implementations of CAESAR Authenticated Ciphers.Farnoud Farahmand, William Diehl, Abubakr Abdulgadir, Jens-Peter Kaps, Kris Gaj
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