| 2018 | High-Frequency Absorption-FIFO Pipelining for Stratix 10 HyperFlex. | Madison N. Emas, Austin Baylis, Greg Stitt |
| 2018 | Fast and Accurate Estimation of Quality of Results in High-Level Synthesis with Machine Learning. | Steve Dai, Yuan Zhou, Hang Zhang, Ecenur Ustun, Evangeline F. Y. Young, Zhiru Zhang |
| 2018 | NewGraph: Balanced Large-Scale Graph Processing on FPGAs with Low Preprocessing Overheads. | Guohao Dai, Tianhao Huang, Yu Wang, Huazhong Yang, John Wawrzynek |
| 2018 | Latte: Locality Aware Transformation for High-Level Synthesis. | Jason Cong, Peng Wei, Cody Hao Yu, Peipei Zhou |
| 2018 | Automatic Interior I/O Elimination in Systolic Array Architecture. | Jason Cong, Jie Wang |
| 2018 | SMEM++: A Pipelined and Time-Multiplexed SMEM Seeding Accelerator for DNA Sequencing. | Jason Cong, Licheng Guo, Po-Tsang Huang, Peng Wei, Tianhe Yu |
| 2018 | Understanding Performance Differences of FPGAs and GPUs. | Jason Cong, Zhenman Fang, Michael Lo, Hanrui Wang, Jingxian Xu, Shaochong Zhang |
| 2018 | Exploration of Low Numeric Precision Deep Learning Inference Using Intel FPGAs. | Philip Colangelo, Nasibeh Nasiri, Eriko Nurvitadhi, Asit K. Mishra, Martin Margala, Kevin Nealis |
| 2018 | Automatic Offloading of Cluster Accelerators. | Ciro Ceissler, Ramon Nepomuceno, Mrcio Machado Pereira, Guido Araujo |
| 2018 | Improving the Effectiveness of TMR Designs on FPGAs with SEU-Aware Incremental Placement. | Matthew Cannon, Andrew M. Keller, Michael J. Wirthlin |
| 2018 | From C to Fault-Tolerant FPGA-Based Systems. | Dimitris Agiakatsikas, Ganghee Lee, Thomas Mitchell, Ediz Cetin, Oliver Diessel |
| 2018 | ReBNet: Residual Binarized Neural Network. | Mohammad Ghasemzadeh, Mohammad Samragh, Farinaz Koushanfar |
| 2018 | Hoplite-Q: Priority-Aware Routing in FPGA Overlay NoCs. | Siddhartha, Nachiket Kapre |
| 2017 | Scalable Network Function Virtualization for Heterogeneous Middleboxes. | Xuzhi Zhang, Xiaozhe Shao, George Provelengios, Naveen Kumar Dumpala, Lixin Gao, Russell Tessier |
| 2017 | Bonded Force Computations on FPGAs. | Qingqing Xiong, Martin C. Herbordt |
| 2017 | Exploring High Efficiency Hardware Accelerator for the Key Algorithm of Square Kilometer Array Telescope Data Processing. | Qian Wu, Yongxin Zhu, Xu Wang, Mengjun Li, Junjie Hou, Ali Masoumi |
| 2017 | CAPSL: A Tool for Automatic Generation of Hardware Sandboxes for IP Security. | Taylor J. L. Whitaker, Christophe Bobda |
| 2017 | Automata-to-Routing: An Open-Source Toolchain for Design-Space Exploration of Spatial Automata Processing Architectures. | Jack Wadden, Samira Manabi Khan, Kevin Skadron |
| 2017 | CPRring: A Structure-Aware Ring-Based Checkpointing Architecture for FPGA Computing. | Hoang Gia Vu, Shinya Takamaeda-Yamazaki, Takashi Nakada, Yasuhiko Nakashima |
| 2017 | A High-Level Synthesis Approach Optimizing Accumulations in Floating-Point Programs Using Custom Formats and Operators. | Yohann Uguen, Florent de Dinechin, Steven Derrien |
| 2017 | Improved Synthesis of Compressor Trees on FPGAs in High-Level Synthesis. | Le Tu, Yuelai Yuan, Kan Huang, Xiaoqiang Zhang, Zixin Wang, Dihu Chen |
| 2017 | Multi-FPGA Evaluation Platform for Disaggregated Computing. | Dimitris Theodoropoulos, Nikolaos Alachiotis, Dionisios N. Pnevmatikatos |
| 2017 | Megrez: Parallelizing FPGA Routing with Strictly-Ordered Partitioning. | Minghua Shen, Guojie Luo |
| 2017 | Escher: A CNN Accelerator with Flexible Buffering to Minimize Off-Chip Transfer. | Yongming Shen, Michael Ferdman, Peter A. Milder |
| 2017 | Evaluating Rapid Application Development with Python for Heterogeneous Processor-Based FPGAs. | Andrew G. Schmidt, Gabriel Weisz, Matthew French |