| 2017 | Customizing Neural Networks for Efficient FPGA Implementation. | Mohammad Samragh, Mohammad Ghasemzadeh, Farinaz Koushanfar |
| 2017 | Fast and Energy-Driven Design Space Exploration for Heterogeneous Architectures. | Baptiste Roux, Matthieu Gautier, Olivier Sentieys, Jean-Philippe Delahaye |
| 2017 | Centaur: A Framework for Hybrid CPU-FPGA Databases. | Muhsen Owaida, David Sidler, Kaan Kara, Gustavo Alonso |
| 2017 | SWiF: A Simplified Workload-Centric Framework for FPGA-Based Computing. | David Ojika, Piotr Majcher, Wojciech Neubauer, Suchit Subhaschandra, Darin Acosta |
| 2017 | Scheduling Considerations for Voter Checking in TMR-MER Systems. | Nguyen T. H. Nguyen, Ediz Cetin, Oliver Diessel |
| 2017 | A Case for Common-Case: On FPGA Acceleration of Erasure Coding. | Reza Nakhjavani, Jianwen Zhu |
| 2017 | Minimalist Design for Accelerating Convolutional Neural Networks for Low-End FPGA Platforms. | Raghid Morcel, Haitham Akkary, Hazem M. Hajj, Mazen A. R. Saghir, Anil S. Keshavamurthy, Rahul Khanna, Hassan Artail |
| 2017 | K-Mer Counting Using Bloom Filters with an FPGA-Attached HMC. | Nathaniel McVicar, Chih-Ching Lin, Scott Hauck |
| 2017 | The Potential of Dynamic Binary Modification and CPU-FPGA SoCs for Simulation. | John Mawer, Oscar Palomar, Cosmin Gorgovan, Andy Nisbet, Will Toms, Mikel Lujn |
| 2017 | High-Performance Hardware Merge Sorter. | Susumu Mashimo, Thiem Van Chu, Kenji Kise |
| 2017 | Dynamic Module Partitioning for Library Based Placement on Heterogeneous FPGAs. | Fubing Mao, Wei Zhang, Bingsheng He, SiewKei Lam |
| 2017 | Evaluating Fast Algorithms for Convolutional Neural Networks on FPGAs. | Liqiang Lu, Yun Liang, Qingcheng Xiao, Shengen Yan |
| 2017 | An FPGA Design Framework for CNN Sparsification and Acceleration. | Sicheng Li, Wei Wen, Yu Wang, Song Han, Yiran Chen, Hai Li |
| 2017 | FPGA Delay Model Considering Logic-Level and Transistor-Level Parameters. | Qiang Liu, HanJing Qian |
| 2017 | Communication-Aware MCMC Method for Big Data Applications on FPGAs. | Shuanglong Liu, Christos-Savvas Bouganis |
| 2017 | TLegUp: A TMR Code Generation Tool for SRAM-Based FPGA Applications Using HLS. | Ganghee Lee, Dimitris Agiakatsikas, Tong Wu, Ediz Cetin, Oliver Diessel |
| 2017 | An Architecture for the Acceleration of a Hybrid Leaky Integrate and Fire SNN on the Convey HC-2ex FPGA-Based Processor. | Emmanouil Kousanakis, Apostolos Dollas, Euripides Sotiriades, Ioannis Papaefstathiou, Dionisios N. Pnevmatikatos, Athanasia Papoutsi, Panagiotis C. Petrantonakis, Panayiota Poirazi, Spyridon Chavlis, George Kastellakis |
| 2017 | Improving the Accuracy of Arctan for Face Detection. | Youngsoo Kim, Hossein Shahdoost, Shrikant Jadhav, Clay S. Gloster Jr. |
| 2017 | Accelerating Large-Scale Graph Analytics with FPGA and HMC. | Soroosh Khoram, Jialiang Zhang, Maxwell Strange, Jing Li |
| 2017 | FPGA-Accelerated Dense Linear Machine Learning: A Precision-Convergence Trade-Off. | Kaan Kara, Dan Alistarh, Gustavo Alonso, Onur Mutlu, Ce Zhang |
| 2017 | Implementing FPGA Overlay NoCs Using the Xilinx UltraScale Memory Cascades. | Nachiket Kapre |
| 2017 | On Bit-Serial NoCs for FPGAs. | Nachiket Kapre |
| 2017 | Terabyte Sort on FPGA-Accelerated Flash Storage. | Sang Woo Jun, Shuotao Xu, Arvind |
| 2017 | An Out-of-Order Load-Store Queue for Spatial Computing. | Lana Josipovic, Philip Brisk, Paolo Ienne |
| 2017 | A Real-Time Embedded FPGA Processor for a Stand-Alone Dual-Mode Assistive Device. | Ali Jafari, Maysam Ghovanloo, Tinoosh Mohsenin |