| 2016 | High Performance Instruction Scheduling Circuits for Out-of-Order Soft Processors. | Henry Wong, Vaughn Betz, Jonathan Rose |
| 2016 | RP-Ring: A Heterogeneous Multi-FPGA Accelerating Solution for N-Body Simulations. | Tianqi Wang, Xi Jin, Bo Peng, Chuanjun Wang, Linlin Zheng |
| 2016 | fpgaConvNet: A Framework for Mapping Convolutional Neural Networks on FPGAs. | Stylianos I. Venieris, Christos-Savvas Bouganis |
| 2016 | Increasing Network Size and Training Throughput of FPGA Restricted Boltzmann Machines Using Dropout. | Jiang Su, David B. Thomas, Peter Y. K. Cheung |
| 2016 | Parallel Hardware Merge Sorter. | Wei Song, Dirk Koch, Mikel Lujn, Jim D. Garside |
| 2016 | Parallelizing FPGA Technology Mapping through Partitioning. | Chuyu Shen, Zili Lin, Ping Fan, Xianglong Meng, Weikang Qian |
| 2016 | Application-Aware Collective Communication (Extended Abstract). | Jiayi Sheng, Qingqing Xiong, Chen Yang, Martin C. Herbordt |
| 2016 | FPGA-Accelerated Particle-Grid Mapping. | Ahmed Sanaullah, Arash Khoshparvar, Martin C. Herbordt |
| 2016 | Initiation Interval Aware Resource Sharing for FPGA DSP Blocks. | Bajaj Ronak, Suhaib A. Fahmy |
| 2016 | Tinker: Generating Custom Memory Architectures for Altera's OpenCL Compiler. | Dustin Richmond, Jeremy Blackstone, Matthew Hogains, Kevin Thai, Ryan Kastner |
| 2016 | FPGA-Based Reduction Techniques for Efficient Deep Neural Network Deployment. | Adam Page, Tinoosh Mohsenin |
| 2016 | Online Bandwidth Reduction Using Dynamic Partial Reconfiguration. | Seyyed Mahdi Najmabadi, Zhe Wang, Yousef Baroud, Sven Simon |
| 2016 | Parallelism for High-Performance Tsunami Simulation with FPGA: Spatial or Temporal? | Kohei Nagasu, Kentaro Sano, Fumiya Kono, Naohito Nakasato, Alexander Vazhenin, Stanislav G. Sedukhin |
| 2016 | A Dynamically Scheduled Architecture for the Synthesis of Graph Database Queries. | Marco Minutoli, Vito Giovanni Castellana, Antonino Tumeo, Fabrizio Ferrandi, Marco Lattuada |
| 2016 | Acceleration of the Pair-HMM Algorithm for DNA Variant Calling. | Gowthami Jayashri Manikandan, Sitao Huang, Kyle Rupnow, Wen-mei W. Hwu, Deming Chen |
| 2016 | Loop Splitting for Efficient Pipelining in High-Level Synthesis. | Junyi Liu, John Wickerson, George A. Constantinides |
| 2016 | Cost Effective Partial Scan for Hardware Emulation. | Tao Li, Qiang Liu |
| 2016 | Spatial Predicates Evaluation in the Geohash Domain Using Reconfigurable Hardware. | Dajung Lee, Roger Moussalli, Sameh W. Asaad, Mudhakar Srivatsa |
| 2016 | Knowledge Transfer in Automatic Optimisation of Reconfigurable Designs. | Maciej Kurek, Marc Peter Deisenroth, Wayne Luk, Timothy John Todman |
| 2016 | CS-Based Secured Big Data Processing on FPGA. | Amey M. Kulkarni, Ali Jafari, Colin Shea, Tinoosh Mohsenin |
| 2016 | Bridging the Performance-Programmability Gap for FPGAs via OpenCL: A Case Study with OpenDwarfs. | Konstantinos Krommydas, Ahmed E. Helal, Anshuman Verma, Wu-chun Feng |
| 2016 | Finding Space-Time Stream Permutations for Minimum Memory and Latency. | Thaddeus Koehn, Peter M. Athanas |
| 2016 | An Empirical Analysis of the Fidelity of VPR Area Models. | Farheen Fatima Khan, Andy Ye |
| 2016 | Communication Optimization for the 16-Core Epiphany Floating-Point Processor Array. | Nachiket Kapre, Siddhartha |
| 2016 | Marathon: Statically-Scheduled Conflict-Free Routing on FPGA Overlay NoCs. | Nachiket Kapre |