| 1998 | Mapping Homogeneous Computations onto Dynamically Configurable Coarse-Grained Architectures. | Andreas Dandalis, Viktor K. Prasanna |
| 1998 | Specifying and Compiling Applications for RaPiD. | Darren C. Cronquist, Paul Franklin, Stefan G. Berg, Carl Ebeling |
| 1998 | SLAAC: A Distributed Architecture for Adaptive Computing. | Stephen P. Crago, Brian Schott, Robert Parker |
| 1998 | Object Oriented Circuit-Generators in Java. | Michael Chu, Nicholas Weaver, Kolja Sulimma, Andr DeHon, John Wawrzynek |
| 1998 | Circlets: Circuits as Applets. | Gordon J. Brebner |
| 1998 | The Systolic Array Genetic Algorithm, An Example of Systolic Arrays as a Reconfigurable Design Methodology. | I. M. Bland, Graham M. Megson |
| 1998 | JHDL - An HDL for Reconfigurable Systems. | Peter Bellows, Brad L. Hutchings |
| 1998 | An Architecture Simulator for National Semiconductor's Adaptive Processing Architecture (NAPA). | Jeffrey M. Arnold |
| 1998 | Mapping the MD5 Hash Algorithm onto the NAPA Architecture. | Jeffrey M. Arnold |
| 1998 | RVC - A Reconfigurable Coprocessor for Vector Processing Applications. | Jos Carlos Alves, Jos Silva Matos |
| 1997 | Speech recognition HMM training on reconfigurable parallel processor. | Hyun-Kyu Yun, Aaron Smith, Harvey F. Silverman |
| 1997 | FPGA synthesis on the XC6200 using IRIS and Trianus/Hades (or from heaven to hell and back again). | Roger F. Woods, Stefan H.-M. Ludwig, Jean-Paul Heron, David W. Trainor, Stephan W. Gehring |
| 1997 | Real-time stereo vision on the PARTS reconfigurable computer. | John Woodfill, Brian Von Herzen |
| 1997 | Automated field-programmable compute accelerator design using partial evaluation. | Qiang Wang, David M. Lewis |
| 1997 | A time-multiplexed FPGA. | Steven Trimberger, Dean Carberry, Anders Johnson, Jennifer Wong |
| 1997 | A parallel hardware evolvable computer POLYP. | Uwe Tangen, Ludger Schulte, John S. McCaskill |
| 1997 | Incremental reconfiguration for pipelined applications. | Herman Schmit |
| 1997 | Automated target recognition on SPLASH 2. | Michael Rencher, Brad L. Hutchings |
| 1997 | Comparison of arithmetic architectures for Reed-Solomon decoders in reconfigurable hardware. | Christof Paar, Martin Rosner |
| 1997 | Systems performance measurement on PCI Pamette. | Laurent Moll, Mark Shand |
| 1997 | An FPGA-based coprocessor for ATM firewalls. | John T. McHenry, Patrick W. Dowd, Frank A. Pellegrino, Todd M. Carrozzi, W. B. Cocks |
| 1997 | A wireless LAN demodulator in a Pamette: design and experience. | Tom McDermott, Philip J. Ryan, Mark Shand, David J. Skellern, Terry Percival, Neil Weste |
| 1997 | An FPGA architecture for DRAM-based systolic computations. | Norman Margolus |
| 1997 | Compilation tools for run-time reconfigurable designs. | Wayne Luk, Nabeel Shirazi, Peter Y. K. Cheung |
| 1997 | Implementation of single precision floating point square root on FPGAs. | Yamin Li, Wanming Chu |