| 1997 | Mapping a real-time video algorithm to a context-switched FPGA. | Steven H. Kelem |
| 1997 | Garp: a MIPS processor with a reconfigurable coprocessor. | John R. Hauser, John Wawrzynek |
| 1997 | The Chimaera reconfigurable functional unit. | Scott Hauck, Thomas W. Fry, Matthew M. Hosler, Jeffrey P. Kao |
| 1997 | Increased FPGA capacity enables scalable, flexible CCMs: an example from image processing. | Jack Greenbaum, Michael Baxter |
| 1997 | High level compilation for fine grained FPGAs. | Maya B. Gokhale, D. Gomersall |
| 1997 | Mapping applications to the RaPiD configurable architecture. | Carl Ebeling, Darren C. Cronquist, Paul Franklin, Jason Secosky, Stefan G. Berg |
| 1997 | Defect tolerance on the Teramac custom computer. | W. Bruce Culbertson, Rick Amerson, Richard J. Carter, Philip Kuekes, Greg Snider |
| 1997 | On acceleration of the check tautology logic synthesis algorithm using an FPGA-based reconfigurable coprocessor. | Jason Cong, John Peck |
| 1997 | Laser defect correction applications to FPGA based custom computers. | Glenn H. Chapman, Benoit Dufort |
| 1997 | Acceleration of an FPGA router. | Pak K. Chan, Martine D. F. Schlag |
| 1997 | Datapath-oriented FPGA mapping and placement for configurable computing. | Timothy J. Callahan, John Wawrzynek |
| 1997 | A dynamic reconfiguration run-time system. | Jim Burns, Adam Donlin, Jonathan Hogg, Satnam Singh, Mark de Wit |
| 1997 | The swappable logic unit: a paradigm for virtual hardware. | Gordon J. Brebner |
| 1997 | Computing kernels implemented with a wormhole RTR CCM. | Ray Bittner, Peter M. Athanas |
| 1997 | Efficient implementation of the DCT on custom computers. | Neil W. Bergmann, Yuk Ying Chung, Bernard K. Gunther |
| 1997 | The RAW benchmark suite: computation structures for general purpose computing. | Jonathan Babb, Matthew I. Frank, Victor Lee, Elliot Waingold, Rajeev Barua, Michael B. Taylor, Jang Kim, Devabhaktuni Srikrishna, Anant Agarwal |
| 1997 | Fault simulation on reconfigurable hardware. | Miron Abramovici, Prem R. Menon |
| 1996 | RACER: a reconfigurable constraint-length 14 Viterbi decoder. | David Yeh, Gennady Feygin, Paul Chow |
| 1996 | SOP: a reconfigurable massively parallel system and its control-data-flow based compiling method. | Tsukasa Yamauchi, Shogo Nakaya, Nobuki Kajihara |
| 1996 | VLSI architectures for field programmable gate arrays: a case study. | Roger F. Woods, A. Cassidy, J. Gray |
| 1996 | OneChip: an FPGA processor with reconfigurable logic. | Ralph Wittig, Paul Chow |
| 1996 | A software development system for FPGA-based data acquisition systems. | Alan S. Wenban, Geoffrey Brown |
| 1996 | Configurable computing solutions for automatic target recognition. | John D. Villasenor, Brian Schoner, Kang-Ngee Chia, Charles Zapata, Hea Joung Kim, Christopher R. Jones, Shane Lansing, Bill Mangione-Smith |
| 1996 | Expressing dynamic reconfiguration by partial evaluation. | Satnam Singh, Jonathan Hogg, Derek McAuley |
| 1996 | A quantitative analysis of processor-programmable logic interface. | Sriram K. Rajamani, Pramod Viswanath |