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ACM Int'l Symposium on Field Programmable Gate Arrays

FPGA

A

CORE rank

CORE rank (raw)

A

Fields of research

Computer Systems Engineering

Papers indexed

1,710

1992–2026

Papers per year

199294 peak2026

FPGA papers

1,710 records sourced from DBLP. Search titles, filter by year, sort by recency.

YearTitleAuthors
2017120-core microAptiv MIPS Overlay for the Terasic DE5-NET FPGA board.Chethan Kumar H. B, Prashant Ravi, Gourav Modi, Nachiket Kapre
2017Automatic Generation of Hardware Sandboxes for Trojan Mitigation in Systems on Chip (Abstract Only).Christophe Bobda, Taylor J. L. Whitaker, Charles A. Kamhoua, Kevin A. Kwiat, Laurent Njilla
2017ASAP: Accelerated Short Read Alignment on Programmable Hardware (Abstract Only).Subho S. Banerjee, Mohamed El-Hadedy, Jong Bin Lim, Daniel Chen, Zbigniew T. Kalbarczyk, Deming Chen, Ravishankar K. Iyer
2017An OpenCL™ Deep Learning Accelerator on Arria 10.Utku Aydonat, Shane O'Connell, Davor Capalija, Andrew C. Ling, Gordon R. Chiu
2017Stochastic-Based Multi-stage Streaming Realization of a Deep Convolutional Neural Network (Abstract Only).Mohammed Alawad, Mingjie Lin
2017Accurate and Efficient Hyperbolic Tangent Activation Function on FPGA using the DCT Interpolation Filter (Abstract Only).Ahmed M. Abdelsalam, J. M. Pierre Langlois, Farida Cheriet
2016HGum: Messaging Framework for Hardware Accelerators (Abstact Only).Sizhuo Zhang, Hari Angepat, Derek Chiou
2016An Improved Global Stereo-Matching on FPGA for Real-Time Applications (Abstract Only).Daolu Zha, Xi Jin, Tian Xiang
2016FPRESSO: Enabling Express Transistor-Level Exploration of FPGA Architectures.Grace Zgheib, Manana Lortkipanidze, Muhsen Owaida, David Novo, Paolo Ienne
2016An FPGA-Based Controller for a 77 GHz MEMS Tri-Mode Automotive Radar (Abstract Only).Sabrina Zereen, Sundeep Lal, Mohammed A. S. Khalid, Sazzadur Chowdhury
2016FPGA Power Estimation Using Automatic Feature Selection (Abstract Only).Yunxuan Yu, Lei He
2016DCPUF: Placement and Routing Constraint based Dynamically Configured Physical Unclonable Function on FPGA (Abstact Only).Jing Ye, Yu Hu, Xiaowei Li
2016Testing FPGA Local Interconnects Based on Repeatable Configuration Modules (Abstract Only).Zhen Yang, Jian Wang, Meng Yang, Jinmei Lai
2016Physical Design of 3D FPGAs Embedded with Micro-channel-based Fluidic Cooling.Zhiyuan Yang, Ankur Srivastava
2016Case for Design-Specific Machine Learning in Timing Closure of FPGA Designs.Que Yanghua, Chinnakkannu Adaikkala Raj, Harnhua Ng, Kirvy Teo, Nachiket Kapre
2016Automated Verification Code Generation in HLS Using Software Execution Traces (Abstract Only).Liwei Yang, Swathi T. Gurumani, Suhaib A. Fahmy, Deming Chen, Kyle Rupnow
2016LMC: Automatic Resource-Aware Program-Optimized Memory Partitioning.Hsin-Jung Yang, Kermin Fleming, Michael Adler, Felix Winterstein, Joel S. Emer
2016SEU Mitigation and Validation of the LEON3 Soft Processor Using Triple Modular Redundancy for Space Processing.Michael J. Wirthlin, Andrew M. Keller, Chase McCloskey, Parker Ridd, David S. Lee, Jeffrey Draper
2016A Study of Pointer-Chasing Performance on Shared-Memory Processor-FPGA Systems.Gabriel Weisz, Joseph Melber, Yu Wang, Kermin Fleming, Eriko Nurvitadhi, James C. Hoe
2016an Extensible Heterogeneous Multi-FPGA Framework for Accelerating N-body Simulation (Abstract Only).Tianqi Wang, Bo Peng, Xi Jin
2016Accelerating Database Query Processing on OpenCL-based FPGAs (Abstract Only).Zeke Wang, Hui Yan Cheah, Johns Paul, Bingsheng He, Wei Zhang
2016A 1 GSa/s, Reconfigurable Soft-core FPGA ADC (Abstract Only).Stefan Visser, Harald Homulle, Edoardo Charbon
2016Machine-Learning driven Auto-Tuning of High-Level Synthesis for FPGAs (Abstract Only).Li Ting, Harri Wijaya, Nachiket Kapre
2016A Full-Capacity Local RoutingArchitecture for FPGAs (Abstract Only).Xifan Tang, Pierre-Emmanuel Gaillardon, Giovanni De Micheli
2016Efficient Memory Partitioning for Parallel Data Access via Data Reuse.Jincheng Su, Fan Yang, Xuan Zeng, Dian Zhou
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