| 2000 | The application of genetic algorithms to the design of reconfigurable reasoning VLSI chips. | Moritoshi Yasunaga, Jung Hwan Kim, Ikuo Yoshihara |
| 2000 | Improving the performance and efficiency of an adaptive amplification operation using configurable hardware (poster abstract). | Michael J. Wirthlin, Paul S. Graham |
| 2000 | Heterogeneous technology mapping for FPGAs with dual-port embedded memory arrays. | Steven J. E. Wilton |
| 2000 | Power estimation approach for SRAM-based FPGAs. | Karlheinz Wei, Carsten Oetker, Igor Katchan, Thorsten Steckstor, Wolfgang Rosenstiel |
| 2000 | Reconfigurable target recognition system (poster abstract). | Gbor Szed, Sandeep Neema, Jason Scott, Ted Bapty |
| 2000 | A novel high throughput reconfigurable FPGA architecture. | Amit Singh, Luca Macchiarulo, Arindam Mukherjee, Malgorzata Marek-Sadowska |
| 2000 | Implementing a RAKE receiver for wireless communications on an FPGA-based computer system. | Ali M. Shankiti, Miriam Leeser |
| 2000 | An FPGA-based genetic algorithm machine (poster abstract). | Barry Shackleford, Etsuko Okushi, Mitsuhiro Yasuda, Hisao Koizumi, Katsuhiko Seo, Takashi Iwamoto, Hiroto Yasuura |
| 2000 | Scalable interconnect and power distribution for island-style FPGAs (poster abstract). | Herman Schmit, David Whelihan, Peter Kamarchik, Frank Gennari |
| 2000 | The John Henry Syndrome (panel session)(abstract only): humans vs. machines as FPGA designers. | Herman Schmit, Ray Andraka, Philip Friedin, Satnam Singh, Tim Southgate |
| 2000 | Algorithm analysis and mapping environment for adaptive computing systems (poster abstract). | Eric K. Pauer, Paul D. Fiore, John M. Smith, Cory S. Myers |
| 2000 | Synthesizing full-systolic arrays for matrix product on Xilinx's XC4000(E, EX) FPGAs (poster abstract). | Abdelkrim Kamel Oudjida, Sabrina Titri, Mustapha Hamerlain |
| 2000 | FPGA implementation and analysis of image restoration. | F. S. Ogrenci, Aggelos K. Katsaggelos, Majid Sarrafzadeh |
| 2000 | Real-time, frame-rate face detection on a configurable hardware system (poster abstract). | Rob McCready, Jonathan Rose |
| 2000 | Timing-driven placement for FPGAs. | Alexander Marquardt, Vaughn Betz, Jonathan Rose |
| 2000 | Field programmable port extender (FPX) for distributed routing and queuing. | John W. Lockwood, Jonathan S. Turner, David E. Taylor |
| 2000 | Cost minimization of partitioned circuits with complex resource constraints in FPGAs (poster abstract). | Yu-Chung Lin, Su-Feng Tseng, Tsai-Ming Hsieh |
| 2000 | Generating highly-routable sparse crossbars for PLDs. | Guy G. Lemieux, Paul Leventis, David M. Lewis |
| 2000 | Coarse-grained carry architecture for FPGA (poster abstract). | Hyuk-Jun Lee, Michael J. Flynn |
| 2000 | Tolerating operational faults in cluster-based FPGAs. | Vijay Lakamraju, Russell Tessier |
| 2000 | A benchmark suite for evaluating configurable computing systems--status, reflections, and future directions. | S. Kumar, Luiz Pires, Subburajan Ponnuswamy, C. Nanavati, J. Golusky, M. Vojta, S. Wadi, D. Pandalai, Henk A. E. Spaanenburg |
| 2000 | A reconfigurable multi-function computing cache architecture. | Huesung Kim, Arun K. Somani, Akhilesh Tyagi |
| 2000 | Factoring large numbers with programmable hardware. | Hea Joung Kim, William H. Mangione-Smith |
| 2000 | Technology mapping issues for an FPGA with lookup tables and PLA-like blocks. | Alireza Kaviani, Stephen Brown |
| 2000 | Novel hardware-software architecture for the recursive merge filtering algorithm (poster abstract). | Piyush Jamkhandi, Amar Mukherjee, Kunal Mukherjee, Robert Franceschini |