| 2000 | A representation for dynamic graphs in reconfigurable hardware and its application to fundamental graph algorithms. | Lorenz Huelsbergen |
| 2000 | Programmable memory blocks supporting content-addressable memory. | Frank Heile, Andrew Leaver, Kerry Veenstra |
| 2000 | Synthesis and domain-specific optimization of KressArray-based reconfigurable computing engines (poster abstract). | Reiner W. Hartenstein, Michael Herz, Thomas Hoffmann, Ulrich Nageldinger |
| 2000 | Low power digital design in FPGAs (poster abstract): a study of pipeline architectures implemented in a FPGA using a low supply voltage to reduce power consumption. | Andrs D. Garca, Jean-Luc Danger, Wayne P. Burleson |
| 2000 | Virtualization of FPGA via segmentation (poster abstract). | William Fornaciari, Vincenzo Piuri, Luigi Ripamonti |
| 2000 | An FPGA implementation and performance evaluation of the Serpent block cipher. | Adam J. Elbirt, Christof Paar |
| 2000 | Synthesis for FPGAs with embedded memory blocks. | Jason Cong, Kenneth Yan |
| 2000 | Technology mapping for k/m-macrocell based FPGAs. | Jason Cong, Hui Huang, Xin Yuan |
| 2000 | New parallelization and convergence results for NC: a negotiation-based FPGA router. | Pak K. Chan, Martine D. F. Schlag |
| 2000 | FPGA clock management for low power applications (poster abstract). | Ian Brynjolfson, Zeljko Zilic |
| 2000 | Automatic generation of FPGA routing architectures from high-level descriptions. | Vaughn Betz, Jonathan Rose |
| 2000 | Design and implementation of an FPGA based processor for compressed images (poster abstract). | V. S. Balakrishnan, Hardy J. Pottinger, Fikret Eral, Mukesh Agarwal |
| 2000 | Determining the optimum extended instruction-set architecture for application specific reconfigurable VLIW CPUs (poster abstract). | Cesare Alippi, William Fornaciari, Laura Pozzi, Mariagiovanna Sami |
| 2000 | The effect of LUT and cluster size on deep-submicron FPGA performance and density. | Elias Ahmed, Jonathan Rose |
| 1999 | Procedural Texture Mapping on FPGAs. | Andy Gean Ye, David M. Lewis |
| 1999 | Implementing an Artificial CPG Using Fine-Grain FPGAs. | Zhijun Yang, Felipe M. G. Frana |
| 1999 | Universal Switch Blocks for Three-Dimensional FPGA Design. | Guang-Ming Wu, Michael Shyu, Yao-Wen Chang |
| 1999 | Exploiting FPGA-Features During the Emulation of a Fast Reactive Embedded System. | Karlheinz Wei, Thorsten Steckstor, Gernot Koch, Wolfgang Rosenstiel |
| 1999 | HSRA: High-Speed, Hierarchical Synchroous Reconfigurable Array. | William Tsu, Kip Macy, Atul Joshi, Randy Huang, Norman Walker, Tony Tung, Omid Rowhani, George Varghese, John Wawrzynek, Andr DeHon |
| 1999 | Special Arithmetic Operations on FPGAs. | Matti Tommiska |
| 1999 | Throughput Optimization with Design Space Exploration During Partitioning for Multi-FPGA Architectures. | Vinoo Srinivasan, Ranga Vemuri |
| 1999 | Prototyping Board and Development Environment for Rapid Prototyping of Real Time and Regular Digital Signal Processing Application. | Philippe Soulard |
| 1999 | FPGA-Targeted Development System for Embedded Applications. | Valery Sklyarov, Jos A. Fonseca, Ricardo Sal Monteiro, Arnaldo S. R. Oliveira, Andreia Melo, Nuno Lau, Konstantin Kondratjuk, Iouliia Skliarova, Paulo A. C. S. Neves, Antnio de Brito Ferrari |
| 1999 | String Natching on Nulticontext FPGAs Using Self-Reconfiguration. | Reetinder P. S. Sidhu, Alessandro Mei, Viktor K. Prasanna |
| 1999 | Extra-Dimensional Island-Style FPGAs. | Herman Schmit |