| 1999 | A New High Density and Very Low Cost Reprogrammable FPGA Architecture. | Sinan Kaptanoglu, Greg Bakker, Arun Kundu, Ivan Corneillet, Ben Ting |
| 1999 | Exploiting Early Partial Reconfiguration of Run-Time Reconfigurable FPGAs in Embedded Systems Design. | Byungil Jeong, Sungjoo Yoo, Kiyoung Choi |
| 1999 | Memory Interfacing and Instruction Specification for Reconfigurable Processors. | Jeffrey A. Jacob, Paul Chow |
| 1999 | Hierarchical Placement Directives for Parametric IP Blocks. | James Hwang, Cameron Patterson, Sujoy Mitra |
| 1999 | Module Generation of High Performance FPGA-Based Multipliers. | Kun-Ming Ho, Allen C.-H. Wu |
| 1999 | Hybrid Product Term and LUT Based Architectures Using Embedded Memory Blocks. | Frank Heile, Andrew Leaver |
| 1999 | Run-Time Parameterizable Cores. | Steve Guccione, Delon Levi |
| 1999 | FPGA Design Experiences Using the CSELT VIP (TM) Library. | Enrica Filippi, Archille Montanaro, Maurizio Paolini, Maura Turolla |
| 1999 | A Methodology for Fast FPGA Floorplanning. | John Marty Emmert, Dinesh Bhatia |
| 1999 | Multi-Terminal Net Routing for Partial Crossbar-Based Multi-FPGA Systems. | Abdel Ejnioui, N. Ranganathan |
| 1999 | Towards Adaptable Hierarchical Placement for FPGAs. | Florent de Dinechin, Wayne Luk, Steve McKeever |
| 1999 | High-Performance 2-D FPGA DCTs Using Polynomial Transforms. | Chris Dick |
| 1999 | Configuration Caching Vs Data Caching for Striped FPGAs. | Deepali Deshpande, Arun K. Somani, Akhilesh Tyagi |
| 1999 | Balancing Interconnect and Computation in a Reconfiguable Computing Array (or, why you don't really want 100% LUT utilization). | Andr DeHon |
| 1999 | Cut Ranking and Pruning: Enabling a General and Efficient FPGA Mapping Solution. | Jason Cong, Chang Wu, Yuzheng Ding |
| 1999 | Architecture Considerations for Mixed Signals FPGAs. | Luigi Carro |
| 1999 | Fast Compilation for Pipelined Reconfigurable Fabrics. | Mihai Budiu, Seth Copen Goldstein |
| 1999 | FPGA Routing Architecture: Segmentation and Buffering to Optimize Speed and Density. | Vaughn Betz, Jonathan Rose |
| 1999 | Hardware/Software Partitioning Between Microprocessor and Reconfigurable Hardware. | M. Anand, Sanjiv Kapoor, M. Balakrishnan |
| 1999 | An Innovative, Segmented High Performance FPGA Family with Variable-Grain-Architecture and Wide-Gating Functions. | Om Agrawal, Herman Chang, Brad Sharpe-Geisler, Nick Schmitz, Bai Nguyen, Jack Wong, Giap Tran, Fabiano Fontana, Bill Harding |
| 1998 | Bridging Fault Detection in FPGA Interconnects Using | Lan Zhao, D. M. H. Walker, Fabrizio Lombardi |
| 1998 | High-Level Synthesis Using Genetic Algorithms for Dynamically Reconfigurable FPGAs (Abstract). | Xue-Jie Zhang, Kam-Wing Ng, Gilbert H. Young |
| 1998 | SMAP: Heterogeneous Technology Mapping for Area Reduction in FPGAs with Embedded Memory Arrays. | Steven J. E. Wilton |
| 1998 | Advantages of the XC6000 Architecture for Embedded System Design (Abstract). | Karlheinz Wei, Ronny Kistner, Arno Kunzmann, Wolfgang Rosenstiel |
| 1998 | Optimizations for a Highly Cost-Efficient Programmable Logic Architecture. | Kerry Veenstra, Bruce Pedersen, Jay Schleicher, Chiakang Sung |