| 1998 | Scheduling Designs into a Time-Multiplexed FPGA. | Steven Trimberger |
| 1998 | More Wires and Fewer LUTs: A Design Methodology for FPGAs. | Atsushi Takahara, Toshiaki Miyazaki, Takahiro Murooka, Masaru Katayama, Kazuhiro Hayashi, Akihiro Tsutsui, Takaki Ichimori, Ken-nosuke Fukami |
| 1998 | A Fast Routability-Driven Router for FPGAs. | Jordan S. Swartz, Vaughn Betz, Jonathan Rose |
| 1998 | Timing Driven Floorplanning on Programmable Hierarchical Targets. | S. A. Senouci, Aadil Amoura, Helena Krupnova, Gabriele Saucier |
| 1998 | A Fast FPGA (FFPGA) Using Active Interconnect (Abstract). | Paul T. Sasaki |
| 1998 | Constraints from Hell: How to Tell Makes a Good FPGA (Panel). | Jonathan Rose, Sinan Kaptanoglu, Clive McCarthy, Rob Smith, Sandip Vij, Steve Taylor |
| 1998 | A New Retiming-Based Technology Mapping Algorithm for LUT-based FPGAs. | Peichen Pan, Chih-Chang Lin |
| 1998 | A Novel Predictable Segmented FPGA Routing Architecture. | Emil S. Ochotta, Patrick J. Crotty, Charles R. Erickson, Chih-Tsung Huang, Rajeev Jayaraman, Richard C. Li, Joseph D. Linoff, Luan Ngo, Hy V. Nguyen, Kerry M. Pierce, Douglas P. Wieland, Jennifer Zhuang, Scott S. Nance |
| 1998 | Soft Decision Maximum Likelihood Decoders for Binary Linear Block Codes Implemented on FPGAs (Abstract). | Hidehisa Nagano, Takayuki Suyama, Akira Nagoya |
| 1998 | Rapid Prototyping of Multi-Recommendation Modem (Abstract). | Abdellatif Mtibaa, Mohamed Abid, Rached Tourki |
| 1998 | Hardware Implementation of Generalized Profile Search on the GENSTROM Machine (Abstract). | Emeka Mosanya, Jean-Michel Puiatti, Eduardo Sanchez |
| 1998 | REMARC: Reconfigurable Multimedia Array Coprocessor (Abstract). | Takashi Miyamori, Kunle Olukotun |
| 1998 | Performance-Driven Board-Level Routing for FPGA-Based Logic Emulation (Abstract). | Wai-Kei Mak, D. F. Wong |
| 1998 | Circuit Partitioning with Complex Resource Constraints in FPGAs. | Huiqun Liu, Kai Zhu, D. F. Wong |
| 1998 | Implementation of IEEE Single-Precision Floating-Point Operations on FPGAs (Abstract). | Walter B. Ligon III, Greg Monn, S. P. McMillan, Kevin Schoonover, Fred Stivers, Keith D. Underwood |
| 1998 | FPGA Logic Block Architecture for Digit-Serial DSP Applications (Abstract). | Hanho Lee, Sarvesh Shrivastava, Gerald E. Sobelman |
| 1998 | Efficiently Supporting Fault-Tolerance in FPGAs. | John C. Lach, William H. Mangione-Smith, Miodrag Potkonjak |
| 1998 | Block and IP Wrapping for Efficient Design on FPGAs (Abstract). | Helena Krupnova, B. Behnam, Gabriele Saucier |
| 1998 | Evolving Computer Programs Using Rapidly Reconfigurable Field-Programmable Gate Arrays and Genetic Programming. | John R. Koza, Forrest H. Bennett III, Jeffrey L. Hutchings, Stephen L. Bade, Martin A. Keane, David Andre |
| 1998 | FPGA Circuit Optimization Based on Block Integration (Abstract). | Takenori Kouda, Yahiko Kambayashi |
| 1998 | A Hybrid Complete-Graph Partial-Crossbar Routing Architecture for Multi-FPGA Systems. | Mohammed A. S. Khalid, Jonathan Rose |
| 1998 | Mapping Multiplication Algorithms into a Family of LUT-based FPGAs (Abstract). | Manuel Jimnez, Chin-Long Wey, Michael A. Shanblatt |
| 1998 | A 100 MHz PLL Implemented on a 100K Gate Programmable Logic Device (Abstract). | David Jefferson, Srinivas Reddy, Christopher Lane, Ninh Ngo, Wanli Chang, Manuel Mijia, Ketan Zaveri, Cameron McClintock, Richard Cliff |
| 1998 | A New FPGA Architecture for High-Performance bit-Serial Pipeline Datapath (Abstract). | Tsuyoshi Isshiki, Takenobu Shimizugashira, Akihisa Ohta, Imanuddin Amril, Hiroaki Kunieda |
| 1998 | High-Performance Carry Chains for FPGAs. | Scott Hauck, Matthew M. Hosler, Thomas W. Fry |