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Field Programmable Logic and Applications

FPL

B

CORE rank

CORE rank (raw)

B

Fields of research

Computer Systems Engineering

Papers indexed

3,233

1994–2025

Papers per year

1994182 peak2025

FPL papers

3,233 records sourced from DBLP. Search titles, filter by year, sort by recency.

YearTitleAuthors
1997Stream synthesis for a wormhole run-time reconfigurable platform.Brian Kahne, Peter M. Athanas
1997FPGA implementation of a digital IQ demodulator using VHDL.Ching-Chuen Jong, Y. Y. H. Lam, L. S. Ng
1997Auto-configurable array for GCD computation.Tudor Jebelean
1997Technology mapping of heterogeneous LUT-based FPGAs.Maurice Kilavuka Inuani, Jonathan Saul
1997Exploiting reconfigurability through domain-specific systems.Brad L. Hutchings
1997A prototyping environment for fuzzy controllers.Thomas Hollstein, Andreas Kirschbaum, Manfred Glesner
1997Data scheduling to increase performance of parallel accelerators.Reiner W. Hartenstein, Jrgen Becker, Michael Herz, Ulrich Nageldinger
1997P4: A platform for FPGA implementation of protocol boosters.Ilija Hadzic, Jonathan M. Smith
1997Enhancing fixed point DSP processor performance by adding CPLDs as coprocessing elements.David Greenfield, Caleb Crome, Martin S. Won, Doug Amos
1997Technology-driven FSM partitioning for synthesis of large sequential circuits targeting lookup-table based FPGAs.Klaus Feske, Sven Mulka, Manfred Koegst, Gnter Elst
1997Multicontext dynamic reconfiguration and real time probing on a novel mixed signal programmable device with on-chip microprocessor.Julio Faura, Juan Manuel Moreno, Miguel Angel Aguirre Echnove, Phuoc van Duong, Josep Maria Insenser
1997Partial reconfiguration of FPGA mapped designs with applications to fault tolerance and yield enhancement.John Marty Emmert, Dinesh Bhatia
1997Real-time stereopsis using FPGAs.Paul A. Dunn, Peter I. Corke
1997Implementation of pipelined multipliers on Xilinx FPGAs.Tien-Toan Do, Holger Kropp, Markus Schwiegershausen, Peter Pirsch
1997Run-time compaction of FPGA designs.Oliver Diessel, Hossam A. ElGindy
1997Fast parallel implementation of DFT using configurable devices.Andreas Dandalis, Viktor K. Prasanna
1997A hardware/software partitioning algorithm for custom computing machines.Anton V. Chichkov, Carlos Beltrn Almeida
1997A reconfigurable data-localised array for morphological algorithms.Anjit Sekhar Chaudhuri, Peter Y. K. Cheung, Wayne Luk
1997Automatc identification of swappable logic units in XC6200 circuitry.Gordon J. Brebner
1997Virtual radix array processors (V-RaAP).B. Bramer, D. Chauham, M. K. Ibrahim, Amar Aggoun
1997Thermal monitoring on FPGAs using ring-oscillators.Eduardo I. Boemo, Sergio Lpez-Buedo
1997VPR: A new packing, placement and routing tool for FPGA research.Vaughn Betz, Jonathan Rose
1997Automatic mapping of algorithms onto multiple FPGA-SRAM modules.S. J. B. Acock, Keith R. Dimond
1997Satisfiability on reconfigurable hardware.Miron Abramovici, Daniel G. Saab
1996A New FPGA Technology Mapping Approach by Cluster Merging.Kang Yi, Chu Shik Jhon
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