| 2016 | A highly-dense mixed grained reconfigurable architecture with overlay crossbar interconnect using via-switch. | Junshi Hotate, Takashi Kishimoto, Toshiki Higashi, Hiroyuki Ochi, Ryutaro Doi, Munehiro Tada, Tadahiko Sugibayashi, Kazutoshi Wakabayashi, Hidetoshi Onodera, Yukio Mitsuyama, Masanori Hashimoto |
| 2016 | Ouessant: Microcontroller approach for flexible accelerator integration and control in System-on-Chip. | Pierre-Henri Horrein, Benoit Porteboeuf, Andr Lalevee |
| 2016 | ParaFRo: A hybrid parallel FPGA router using fine grained synchronization and partitioning. | Chin Hau Hoo, Yajun Ha, Akash Kumar |
| 2016 | High-speed programmable FPGA Configuration through JTAG. | Ammon Gruwell, Peter Zabriskie, Michael J. Wirthlin |
| 2016 | Optimising Sparse Matrix Vector multiplication for large scale FEM problems on FPGA. | Paul Grigoras, Pavel Burovskiy, Wayne Luk, Spencer J. Sherwin |
| 2016 | Quantifying observability for in-system debug of high-level synthesis circuits. | Jeffrey Goeders, Steven J. E. Wilton |
| 2016 | Energy-efficient stochastic matrix function estimator for graph analytics on FPGA. | Heiner Giefers, Peter W. J. Staar, Raphael Polig |
| 2016 | Automated extra pipeline analysis of applications mapped to Xilinx UltraScale+ FPGAs. | Ilya Ganusov, Henri Fraisse, Aaron Ng, Rafael Trapani Possignolo, Sabya Das |
| 2016 | Time-borrowing platform in the Xilinx UltraScale+ family of FPGAs and MPSoCs. | Ilya Ganusov, Benjamin Devlin |
| 2016 | Automated bug detection for pointers and memory accesses in High-Level Synthesis compilers. | Pietro Fezzardi, Fabrizio Ferrandi |
| 2016 | Bayesian inference implemented on FPGA with stochastic bitstreams for an autonomous robot. | Hugo Fernandes, M. Awais Aslam, Jorge Lobo, Joo Filipe Ferreira, Jorge Dias |
| 2016 | Dimensionality reduction of hyperspectral images using reconfigurable hardware. | Daniel Fenzandez, Carlos Gonzlez, Daniel Mozos |
| 2016 | HeteroSim: A heterogeneous CPU-FPGA simulator. | Liang Feng, Hao Liang, Sharad Sinha, Wei Zhang |
| 2016 | DT-CGRA: Dual-track coarse-grained reconfigurable architecture for stream applications. | Xitian Fan, Huimin Li, Wei Cao, Lingli Wang |
| 2016 | GraVF: A vertex-centric distributed graph processing framework on FPGAs. | Nina Engelhardt, Hayden Kwok-Hay So |
| 2016 | Chaotic architectures for secure free-space optical communication. | Esam El-Araby, Nader M. Namazi |
| 2016 | Modeling considerations for the hardware-software co-design of flexible modern wireless transceivers. | Benjamin Drozdenko, Matthew Zimmermann, Tuan Dao, Kaushik R. Chowdhury, Miriam Leeser |
| 2016 | Towards an all-digital antenna array transmitter. | Daniel Da Costa Dinis, Rui Fiel Cordeiro, Arnaldo S. R. Oliveira, Jos M. N. Vieira |
| 2016 | Transparent FPGA flow. | Baptiste Delporte, Anthony Convers, Roberto Rigamonti, Alberto Dassatti |
| 2016 | An investigation into a circuit based supply chain analyzer for FPGAs. | Jacob Couch, John Arkoian |
| 2016 | Configurable and scalable belief propagation accelerator for computer vision. | Jungwook Choi, Rob A. Rutenbar |
| 2016 | Hoplite-DSP: Harnessing the Xilinx DSP48 multiplexers to efficiently support NoCs on FPGAs. | Kumar H. B. Chethan, Nachiket Kapre |
| 2016 | Optimizing interconnection complexity for realizing fixed permutation in data and signal processing algorithms. | Ren Chen, Viktor K. Prasanna |
| 2016 | Multi-core for K-means clustering on FPGA. | Jose Canilho, Mrio P. Vstias, Horcio C. Neto |
| 2016 | Semi-dense SLAM on an FPGA SoC. | Konstantinos Boikos, Christos-Savvas Bouganis |