| 2016 | Designing a virtual runtime for FPGA accelerators in the cloud. | Mikhail Asiatici, Nithin George, Kizheppatt Vipin, Suhaib A. Fahmy, Paolo Ienne |
| 2016 | Measure twice and cut once: Robust dynamic voltage scaling for FPGAs. | Ibrahim Ahmed, Shuze Zhao, Olivier Trescases, Vaughn Betz |
| 2016 | FMER: A hybrid configuration memory error recovery scheme for highly reliable FPGA SoCs. | Dimitris Agiakatsikas, Ediz etin, Oliver Diessel |
| 2016 | LYNX: CAD for FPGA-based networks-on-chip. | Mohamed S. Abdelfattah, Vaughn Betz |
| 2015 | NetFPGA - rapid prototyping of high bandwidth devices in open source. | Noa Zilberman, Yury Audzevich, Georgina Kalogeridou, Neelakandan Manihatty Bojan, Jingyun Zhang, Andrew W. Moore |
| 2015 | UniStream: A unified stream architecture combining configuration and data processing. | Jian Yan, Jifang Jin, Ying Wang, Xuegong Zhou, Philip H. W. Leong, Lingli Wang |
| 2015 | Scavenger: Automating the construction of application-optimized memory hierarchies. | Hsin-Jung Yang, Kermin Fleming, Michael Adler, Felix Winterstein, Joel S. Emer |
| 2015 | Data protection using recursive inverse function. | Teng Xu, Hongxiang Gu, Miodrag Potkonjak |
| 2015 | SysAlloc: A hardware manager for dynamic memory allocation in heterogeneous systems. | Zeping Xue, David B. Thomas |
| 2015 | Fine-tuning CLB placement to speed up reconfigurations in NVM-based FPGAs. | Yuan Xue, Patrick Cronin, Chengmo Yang, Jingtong Hu |
| 2015 | Parallel feature extraction and heterogeneous object-detection for multi-camera driver assistance systems. | Stefan Wonneberger, Peter Mhlfellner, Pedro Ceriotti, Thorsten Graf, Rolf Ernst |
| 2015 | SPINE: From C loop-nests to highly efficient accelerators using Algorithmic Species. | Mark Wijtvliet, Shakith Fernando, Henk Corporaal |
| 2015 | CoRAM++: Supporting data-structure-specific memory interfaces for FPGA computing. | Gabriel Weisz, James C. Hoe |
| 2015 | A study of data partitioning on OpenCL-based FPGAs. | Zeke Wang, Bingsheng He, Wei Zhang |
| 2015 | Towards heterogeneous solvers for large-scale linear systems. | Stylianos I. Venieris, Grigorios Mingas, Christos-Savvas Bouganis |
| 2015 | A framework for integrated monitoring of real-time embedded SoC. | Giacomo Valente |
| 2015 | Hybrid breadth-first search on a single-chip FPGA-CPU heterogeneous platform. | Yaman Umuroglu, Donn Morrison, Magnus Jahre |
| 2015 | rrBox: A remote dynamically reconfigurable network processing middlebox. | Tze Hon Tan, Chia Yee Ooi, Muhammad N. Marsono |
| 2015 | Accurate power analysis for near-Vt RRAM-based FPGA. | Xifan Tang, Pierre-Emmanuel Gaillardon, Giovanni De Micheli |
| 2015 | Data-triggered breakpoint for in-circuit debug without re-implementation. | Yutaka Tamiya, Yoshinori Tomita, Toshiyuki Ichiba, Kaoru Kawamura |
| 2015 | Rapid prototyping and Design Space Exploration methodologies for many-accelerator systems. | Efstathios Sotiriou-Xanthopoulos, Sotirios Xydis, Kostas Siozios, George Economakos, Dimitrios Soudris |
| 2015 | A variable length hash method for faster short read mapping on FPGA. | Yoko Sogabe, Tsutomu Maruyama |
| 2015 | Recursive pipelined genetic propagation for bilevel optimisation. | Shengjia Shao, Liucheng Guo, Ce Guo, Thomas C. P. Chau, David B. Thomas, Wayne Luk, Stephen Weston |
| 2015 | Estimating circuit delays in FPGAs after technology mapping. | Berg Severens, Elias Vansteenkiste, Karel Heyse, Dirk Stroobandt |
| 2015 | Compact dual block AES core on FPGA for CCM Protocol. | Joo Carlos Resende, Ricardo Chaves |