| 2015 | FPGA based nonlinear Support Vector Machine training using an ensemble learning. | Mudhar Bin Rabieah, Christos-Savvas Bouganis |
| 2015 | Power-efficient range-match-based packet classification on FPGA. | Yun Rock Qu, Viktor K. Prasanna |
| 2015 | Optimizing energy efficient low-swing interconnect for sub-threshold FPGAs. | He Qi, Oluseyi A. Ayorinde, Yu Huang, Benton H. Calhoun |
| 2015 | FPGA-based all-digital Software Defined Radio receiver. | Andre Prata, Arnaldo S. R. Oliveira, Nuno Borges Carvalho |
| 2015 | AmBRAM | Petr Pfeifer |
| 2015 | Wotan: A tool for rapid evaluation of FPGA architecture routability without benchmarks. | Oleg Petelin, Vaughn Betz |
| 2015 | Hybrid FPGA debug approach. | Zdravko Panjkov, Andreas Wasserbauer, Timm Ostermann, Richard Hagelauer |
| 2015 | Domain-specific optimisation for the high-level synthesis of CellML-based simulation accelerators. | Julian Oppermann, Andreas Koch, Ting Yu, Oliver Sinnen |
| 2015 | An automated technique to generate relocatable partial bitstreams for Xilinx FPGAs. | Roel Oomen, Tuan D. A. Nguyen, Akash Kumar, Henk Corporaal |
| 2015 | A resilient, flash-free soft error mitigation concept for the CBM-ToF read-out chain via GBT-SCA. | Andrei-Dumitru Oancea, Christian Stllein, Jano Gebelein, Udo Kebschull |
| 2015 | Efficient data-stream management for shared-memory many-core systems. | Nuno Neves, Pedro Toms, Nuno Roma |
| 2015 | A deep convolutional neural network based on nested residue number system. | Hiroki Nakahara, Tsutomu Sasao |
| 2015 | Inter-procedural resource sharing in High Level Synthesis through function proxies. | Marco Minutoli, Vito Giovanni Castellana, Antonino Tumeo, Fabrizio Ferrandi |
| 2015 | A software configurable coprocessor-based state-space controller. | Aaron Mills, Pei Zhang, Sudhanshu Vyas, Joseph Zambreno, Phillip H. Jones |
| 2015 | OpenCL computing on FPGA using multiported shared memory. | Tahsin Turker Mutlugun, Sheng-De Wang |
| 2015 | 7MOPS/lemon-battery image processing demonstration with an ultra-low power reconfigurable accelerator CMA-SOTB-2. | Koichiro Masuyama, Yu Fujita, Hayate Okuhara, Hideharu Amano |
| 2015 | A run time interpretation approach for creating custom accelerators. | Sen Ma, Zeyad Aklah, David Andrews |
| 2015 | A scalable pipelined architecture for biomimetic vision sensors. | Daniel Llamocca, Brian K. Dean |
| 2015 | Adaptive MRAM-based CGRAs. | Xiaobin Liu, Tedy Thomas, Alan Boguslawski, Russell Tessier |
| 2015 | Temperature-triggered behavioral IPs HW Trojan detection method with FPGAs. | Xiaotong Li, Benjamin Carrin Schfer |
| 2015 | Hierarchical library based power estimator for versatile FPGAs. | Hao Liang, Wei Zhang, Sharad Sinha, Yi-Chung Chen, Hai Li |
| 2015 | Static hardware task placement on multi-context FPGA using hybrid genetic algorithm. | Hao Liang, Sharad Sinha, Rakesh Warrier, Wei Zhang |
| 2015 | Significant papers from the first 25 years of the FPL conference. | Philip Heng Wai Leong, Hideharu Amano, Jason Helge Anderson, Koen Bertels, Joo M. P. Cardoso, Oliver Diessel, Guy Gogniat, Mike Hutton, JunKyu Lee, Wayne Luk, Patrick Lysaght, Marco Platzner, Viktor K. Prasanna, Tero Rissa, Cristina Silvano, Hayden Kwok-Hay So, Yu Wang |
| 2015 | High-level FPGA logic synthesis from .NET programs for software developers. | Zoltan Lehoczky, Richrd Tth, Krisztian Somogyi |
| 2015 | Reduction calculator in an FPGA based switching Hub for high performance clusters. | Takuya Kuhara, Chiharu Tsuruta, Toshihiro Hanawa, Hideharu Amano |