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Field Programmable Logic and Applications

FPL

B

CORE rank

CORE rank (raw)

B

Fields of research

Computer Systems Engineering

Papers indexed

3,233

1994–2025

Papers per year

1994182 peak2025

FPL papers

3,233 records sourced from DBLP. Search titles, filter by year, sort by recency.

YearTitleAuthors
2015Synthesizable FPGA fabrics targetable by the Verilog-to-Routing (VTR) CAD flow.Jin Hee Kim, Jason Helge Anderson
2015High speed ECC implementation on FPGA over GF(2Zia Uddin Ahamed Khan, Mohammed Benaissa
2015Limits of FPGA acceleration of 3D Green's Function computation for geophysical applications.Nachiket Kapre, Jayakrishnan Selva Kumar, Parjanya Gupta, Sagar Shrishailappa Masuti, Sylvain Barbot
2015Hoplite: Building austere overlay NoCs for FPGAs.Nachiket Kapre, Jan Gray
2015A transport-layer network for distributed FPGA platforms.Sang Woo Jun, Ming Liu, Shuotao Xu, Arvind
2015A technology mapper for depth-constrained FPGA logic cells.Zhenghong Jiang, Grace Zgheib, Colin Yu Lin, David Novo, Zhihong Huang, Liqun Yang, Haigang Yang, Paolo Ienne
2015Serial and parallel interleaved modular multipliers on FPGA platform.Khalid Javeed, Xiaojun Wang, Mike Scott
2015Building a distributed key-value store with FPGA-based microservers.Zsolt Istvn, David Sidler, Gustavo Alonso
2015An LZ77-style bit-level compression for trace data compaction.Kai-Uwe Irrgang, Thomas B. Preuer
2015An efficient many-core architecture for Elliptic Curve Cryptography security assessment.Marco Indaco, Fabio Lauri, Andrea Miele, Pascal Trotta
2015Fast hierarchical implementation of sequential tree-reweighted belief propagation for probabilistic inference.Skand Hurkat, Jungwook Choi, Eriko Nurvitadhi, Jos F. Martnez, Rob A. Rutenbar
2015Mind the (synthesis) gap: Examining where academic FPGA tools lag behind industry.Eddie Hung
2015Fast FPGA system for microarchitecture optimization on synthesizable modern processor design.Libo Huang, Yongwen Wang, Qiang Dou, Chengyi Zhang, Caixia Sun, Chao Xu
2015Greedy approach based heuristics for partitioning SpMxV on FPGAs.Jiasen Huang, Weina Lu, Junyan Ren
2015Optimised OpenCL workgroup synthesis for hybrid ARM-FPGA devices.Mohammad Hosseinabady, Jos Luis Nez-Yez
2015Energy optimization of FPGA-based stream-oriented computing with power gating.Mohammad Hosseinabady, Jos Luis Nez-Yez
2015ParaLaR: A parallel FPGA router based on Lagrangian relaxation.Chin Hau Hoo, Akash Kumar, Yajun Ha
2015Over effective hard real-time hardware tasks scheduling and allocation.Zakarya Guettatfi, Omar Kermia, Abdelhakim Khouas
2015Placing partially reconfigurable stream processing applications on FPGAs.Nicolae Bogdan Grigore, Dirk Koch
2015FPGA implementation to estimate the number of endmembers in hyperspectral images.Carlos Gonzlez, Daniel Mozos, Sebastin Lpez, Roberto Sarmiento
2015Automatic support for multi-module parallelism from computational patterns.Nithin George, HyoukJoong Lee, David Novo, Muhsen Owaida, David Andrews, Kunle Olukotun, Paolo Ienne
2015Scheduling-aware interconnect synthesis for FPGA-based Multi-Processor Systems-on-Chip.Edoardo Fusella, Alessandro Cilardo, Antonino Mazzeo
2015Ultra low latency dataflow renderer.Sebastian Friston, Anthony Steed, Simon Tilbury, Georgi Gaydadjiev
2015A fully pipelined kernel normalised least mean squares processor for accelerated parameter optimisation.Nicholas J. Fraser, Duncan J. M. Moss, JunKyu Lee, Stephen Tridgell, Craig T. Jin, Philip Heng Wai Leong
2015PushPush: Seamless integration of hardware and software objects via function calls over AXI.Shane T. Fleming, Ivan Beretta, David B. Thomas, George A. Constantinides, Dan R. Ghica
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