| 2013 | A CMOS Field Programmable Analog Array for intelligent sensory application. | Xiaoyan Cheng, Tao Yin, Qisong Wu, Yiping Jia, Haigang Yang |
| 2013 | Accelerating Random Forest training process using FPGA. | Chuan Cheng, Christos-Savvas Bouganis |
| 2013 | Towards bounded error recovery time in FPGA-based TMR circuits using dynamic partial reconfiguration. | Ediz Cetin, Oliver Diessel, Lingkan Gong, Victor Lai |
| 2013 | SDR control interface: An FPGA based infrastructure for control of VPX Software Defined Radio systems. | Stefanie Castillo, Armando Astarloa, Jess Lzaro, Sergio Salas, Isaac Ballesteros |
| 2013 | FEMIP: A high performance FPGA-based features extractor & matcher for space applications. | Stefano Di Carlo, Giulio Gambardella, Paolo Prinetto, Daniele Rolfo, Pascal Trotta, Piergiorgio Lanza |
| 2013 | Dependable Dynamic Partial Reconfiguration with minimal area & time overheads on Xilinx FPGAS. | Stefano Di Carlo, Giulio Gambardella, Marco Indaco, Paolo Prinetto, Daniele Rolfo, Pascal Trotta |
| 2013 | A high-performance overlay architecture for pipelined execution of data flow graphs. | Davor Capalija, Tarek S. Abdelrahman |
| 2013 | NetThreads-10G: Software packet processing on NetFPGA-10G in a virtualized networking environment demonstration abstract. | Stuart Byma, J. Gregory Steffan, Paul Chow |
| 2013 | Arithmetic core generation using bit heaps. | Nicolas Brunie, Florent de Dinechin, Matei Istoan, Guillaume Sergent, Kinga Illyes, Bogdan Popa |
| 2013 | Iterative floating point computation using FPGA DSP blocks. | Fredrik Brosser, Hui Yan Cheah, Suhaib A. Fahmy |
| 2013 | Design and FPGA implementation of a 100 Gbit/s optical transport network processor. | Rodrigo Bernardo, Arley H. Salvador, Eduardo Mobilon, Luis R. Monte, Stephane Boisclair, Avrum Warshawsky |
| 2013 | Building partial systems with GoAhead. | Christian Beckhoff, Alexander Wold, Anders Fritzell, Dirk Koch, Jim Trresen |
| 2013 | FPGA implementation of Hierarchical Enumerative Coding for locally stationary image source. | Yuhui Bai, Syed Zahid Ahmed, Bertrand Granado |
| 2013 | Pipelining computing stages in configurable multicore architectures. | Ali Azarian |
| 2013 | Hardware-accelerated regular expression matching for high-throughput text analytics. | Kubilay Atasu, Raphael Polig, Christoph Hagleitner, Frederick R. Reiss |
| 2013 | A secure coprocessor for database applications. | Arvind Arasu, Ken Eguro, Raghav Kaushik, Donald Kossmann, Ravi Ramamurthy, Ramarathnam Venkatesan |
| 2013 | Analyzing the thermal hotspots in FPGA-based embedded systems. | Hussam Amrouch, Thomas Ebi, Josef Schneider, Sridevan Parameswaran, Jrg Henkel |
| 2013 | Degradation in FPGAs: Monitoring, modeling and mitigation (PHD forum paper: Thesis broad overview). | Abdulazim Amouri, Mehdi Baradaran Tahoori |
| 2013 | Defect-robust FPGA architectures for intellectual property cores in system LSI. | Motoki Amagasaki, Kazuki Inoue, Qian Zhao, Masahiro Iida, Morihiro Kuga, Toshinori Sueyoshi |
| 2013 | The power of communication: Energy-efficient NOCS for FPGAS. | Mohamed S. Abdelfattah, Vaughn Betz |
| 2012 | A Benign Hardware Trojan on FPGA-based embedded systems. | Jason Xin Zheng, Ethan Chen, Miodrag Potkonjak |
| 2012 | ITester: A FPGA based high performance traffic replay tool. | Fuxing Zhang, Yingke Xie, Junjie Liu, Layong Luo, Qingsong Ning, Xiaolong Wu |
| 2012 | A 16-configuration-context robust optically reconfigurable gate array with a reconfiguration speed adjustment function. | Takashi Yoza, Minoru Watanabe |
| 2012 | Extending BORPH for shared memory reconfigurable computers. | Changqing Xun, Mei Wen, Nan Wu, Chunyuan Zhang, Hayden Kwok-Hay So |
| 2012 | HCM: An abstraction layer for seamless programming of DPR FPGA. | Yan Xu, Olivier Muller, Pierre-Henri Horrein, Frdric Ptrot |