Skip to content

Field Programmable Logic and Applications

FPL

B

CORE rank

CORE rank (raw)

B

Fields of research

Computer Systems Engineering

Papers indexed

3,233

1994–2025

Papers per year

1994182 peak2025

FPL papers

3,233 records sourced from DBLP. Search titles, filter by year, sort by recency.

YearTitleAuthors
2010Detecting Patterns in Various Size and Angle Using FPGA.Masayuki Suzuki, Yoshifumi Tanida, Tsutomu Maruyama
2010Efficient FPGA Modular Multiplication and Exponentiation Architectures Using Digit Serial Computation.Gustavo Sutter, Jean-Pierre Deschamps, Jos Luis Imaa
2010PrEsto: An FPGA-accelerated Power Estimation Methodology for Complex Systems.Dam Sunwoo, Gene Y. Wu, Nikhil A. Patil, Derek Chiou
2010Degradation Analysis and Mitigation in FPGAs.Edward A. Stott, Justin S. J. Wong, Peter Y. K. Cheung
2010SeqHive: A Reconfigurable Computer Cluster for Genome Re-sequencing.Kristian Stevens, Henry Chen, Terry Filiba, Peter L. McMahon, Yun S. Song
2010Reconfigurable Systems for the Zuker and Predator Algorithms for Secondary Structure Prediction of Genetic Data.Miltiadis Smerdis, Panagiotis Dagritzikos, Grigorios Chrysos, Euripides Sotiriades, Apostolos Dollas
2010Self-Aware Adaptation in FPGA-based Systems.Filippo Sironi, Marco Triverio, Henry Hoffmann, Martina Maggio, Marco D. Santambrogio
2010Ultra-low-Power Ultra-fast Hybrid CNEMS-CMOS FPGA.Vijay K. Sirigir, Khawla Alzoubi, Daniel G. Saab, Fatih Kocan, Massood Tabib-Azar
2010FEM: A Step Towards a Common Memory Layout for FPGA Based Accelerators.Muhammad Shafiq, Miquel Perics, Nacho Navarro, Eduard Ayguad
2010Design and Implementation of Real-Time Transactional Memory.Martin Schoeberl, Peter Hilber
2010FPGA Based Engines for Genetic and Memetic Algorithms.Pedro V. Santos, Jos C. Alves
2010On Identifying Patterns in Code Repositories to Assist the Generation of Hardware Templates.Adriano K. Sanches, Joo M. P. Cardoso
2010Mapping Multiple Multivariate Gaussian Random Number Generators on an FPGA.Chalermpol Saiprasert, Christos-Savvas Bouganis, George A. Constantinides
2010A Scalable, High-Performance Motion Estimation Application for a Weakly-Programmable FPGA Architecture.Henning Sahlbach, Sean Whitty, Oliver Bende, Rolf Ernst
2010A Cost-Effective Technique for Mapping BLUTs to QLUTs in FPGAs.Marcus Ritt, Carlos Arthur Lang Lisba, Luigi Carro, Cristiano Lazzari
2010Rapid Prototyping of Radiation-Tolerant Embedded Systems on FPGA.Felipe Restrepo-Calle, Antonio Martnez-lvarez, Francisco R. Palomo, Hiplito Guzmn-Miranda, M. A. Aguirre, Sergio Cuenca-Asensi
2010Accurate Time-to-Digital Converter Based on Xilinx's Digital Clock Managers.ngel Quirs-Olozbal, Ma de los ngeles Cifredo Chacn, Jos Mara Guerrero-Rodrguez
2010A Compact Transactional Memory Multiprocessor System on FPGA.Matteo Pusceddu, Simone Ceccolini, Gianluca Palermo, Donatella Sciuto, Antonino Tumeo
2010Enhancing FPGA Device Capabilities by the Automatic Logic Mapping to Additive Carry Chains.Thomas B. Preuer, Rainer G. Spallek
2010Exploiting Dynamic Reconfiguration for FPGA Based Network Intrusion Detection Systems.Salvatore Pontarelli, Claudio Greco, Enrico Nobile, Simone Teofili, Giuseppe Bianchi
2010Evaluation of Fault-Mitigation Schemes for Fault-Tolerant Dynamic MPSoC.Hung-Manh Pham, Sbastien Pillement, Didier Demigny
2010Software Managed Distributed Memories in MPPAs.Robin Panda, Jimmy Xu, Scott Hauck
2010Run-Time Scalable Systolic Coprocessors for Flexible Multimedia SoPCs.Andrs Otero, Eduardo de la Torre, Teresa Riesgo, Yana Esteves Krasteva
2010COGRE: A Configuration Memory Reduced Reconfigurable Logic Cell Architecture for Area Minimization.Yasuhiro Okamoto, Yoshihiro Ichinomiya, Motoki Amagasaki, Masahiro Iida, Toshinori Sueyoshi
2010A Bus-Based SoC Architecture for Flexible Module Placement on Reconfigurable FPGAs.Andreas Oetken, Stefan Wildermann, Jrgen Teich, Dirk Koch
1,3761,400 of 3,233← PreviousNext →

Comparable venues

Other A*/A conferences filed under the same field of research.