| 2010 | Sum of Absolute Difference Implementations for Image Processing on FPGAs. | Hiroaki Niitsuma, Tsutomu Maruyama |
| 2010 | Memory System for a Dynamically Adaptable Pixel Stream Architecture. | Nicolas Ngan, Geoffroy Marpeaux, Eva Dokldalov, Mohamed Akil, Franois Contou-Carrre |
| 2010 | Flexible and Modular Support for Timing Functions in High Performance Networking Acceleration. | Christopher E. Neely, Gordon J. Brebner, Weijia Shang |
| 2010 | Dynamic Reconfiguration Optimisation with Streaming Data Decompression. | Atukem Nabina, Jos L. Nez-Yez |
| 2010 | Real-Time Fault Detection and Diagnostics Using FPGA-based Architectures. | Nathan Naber, Thomas Getz, Yong Kim, James Petrosky |
| 2010 | MalCoBox: Designing a 10 Gb/s Malware Collection Honeypot Using Reconfigurable Technology. | Sascha Mhlbach, Martin Brunner, Christopher Roblee, Andreas Koch |
| 2010 | Improving QoS of Multi-layer Networks-on-Chip with Partial and Dynamic Reconfiguration of Routers. | Leandro Mller, Peter Fischer, Fernando Moraes, Leandro Soares Indrusiak, Manfred Glesner |
| 2010 | Fast and Low-Memory-Bandwidth Architecture of SIFT Descriptor Generation with Scalability on Speed and Accuracy for VGA Video. | Kosuke Mizuno, Hiroki Noguchi, Guangji He, Yosuke Terachi, Tetsuya Kamino, Hiroshi Kawaguchi, Masahiko Yoshimoto |
| 2010 | LavA: An Open Platform for Rapid Prototyping of MPSoCs. | Matthias Meier, Michael Engel, Matthias Steinkamp, Olaf Spinczyk |
| 2010 | Parallel Hardware Implementation of Connected Component Tree Computation. | Petr Matas, Eva Dokldalov, Mohamed Akil, Vjaceslav Georgiev, Martin Poupa |
| 2010 | Advanced Multithreading Architecture with Hardware Based Scheduling. | Ye Lu, Sakir Sezer, John V. McCanny |
| 2010 | OpenRCL: Low-Power High-Performance Computing with Reconfigurable Devices. | Mingjie Lin, Ilia A. Lebedev, John Wawrzynek |
| 2010 | Hierarchical and Multiple-Clock Domain High-Level Synthesis for Low-Power Design on FPGA. | Ghizlane Lhairech-Lebreton, Philippe Coussy, Eric Martin |
| 2010 | An Interior Point Optimization Solver for Real Time Inter-frame Collision Detection: Exploring Resource-Accuracy-Platform Tradeoffs. | Brian Leung, Chih-Hung Wu, Seda Ogrenci Memik, Sanjay Mehrotra |
| 2010 | Using Hard Macros to Reduce FPGA Compilation Time. | Christopher Lavin, Marc Padilla, Subhrashankha Ghosh, Brent E. Nelson, Brad L. Hutchings, Michael J. Wirthlin |
| 2010 | Robust FPGA Design under Variations. | Akhilesh Kumar, Mohab Anis |
| 2010 | Real-Time Processing of Contrast Limited Adaptive Histogram Equalization on FPGA. | Kentaro Kokufuta, Tsutomu Maruyama |
| 2010 | First Prototype of a Genuine Power-Gatable Reconfigurable Logic Chip with FeRAM Cells. | Masahiro Koga, Masahiro Iida, Motoki Amagasaki, Yoshinobu Ichida, Mitsuro Saji, Jun Iida, Toshinori Sueyoshi |
| 2010 | An FPGA-based High-Speed, Low-Latency Processing System for High-Energy Physics. | Stefan Kirsch, Felix Rettig, Dirk Hutter, Jan de Cuveland, Venelin Angelov, Volker Lindenstruth |
| 2010 | Online Routing Fault Detection for Reconfigurable NoC. | Cdric Killian, Camel Tanougast, Fabrice Monteiro, Abbas Dandache |
| 2010 | FPGA Based Network Traffic Analysis Using Traffic Dispersion Patterns. | Faisal Khan, Maya B. Gokhale, Chen-Nee Chuah |
| 2010 | Efficient FPGA Resynthesis Using Precomputed LUT Structures. | Andrew A. Kennings, Alan Mishchenko, Kristofer Vorwerk, Val Pevzner, Arun Kundu |
| 2010 | A Novel Mechanism for Effective Hardware Task Preemption in Dynamically Reconfigurable Systems. | Krzysztof Jozwik, Hiroyuki Tomiyama, Shinya Honda, Hiroaki Takada |
| 2010 | GPU Versus FPGA for High Productivity Computing. | David Huw Jones, Adam Powell, Christos-Savvas Bouganis, Peter Y. K. Cheung |
| 2010 | Decision Forest: A Scalable Architecture for Flexible Flow Matching on FPGA. | Weirong Jiang, Viktor K. Prasanna, Norio Yamagaki |