Field Programmable Logic and Applications

FPL

CORE rank

CORE rank (raw)

Fields of research

Computer Systems Engineering

Papers indexed

3,233

1994–2025

Best Computer Systems Engineering conferences

Papers per year

1994182 peak2025

Most published authors

FPL papers

3,233 records sourced from DBLP. Search titles, filter by year, sort by recency.

Year	Title	Authors
2008	Automatic generation of run-time parameterizable configurations.	Karel Bruneel, Dirk Stroobandt
2008	Data path driven waveform-like reconfiguration.	Lars Braun, Katarina Paulsson, Herrmann Krmer, Michael Hbner, Jrgen Becker
2008	Real-time image super resolution using an FPGA.	Oliver Bowen, Christos-Savvas Bouganis
2008	FPGA: The future platform for transforming, transporting and computing data.	Ivo Bolsens
2008	An FPGA-based implementation of the MINRES algorithm.	David Boland, George A. Constantinides
2008	A dynamic temperature control simulation system for FPGAs.	Shilpa Bhoj, Dinesh Bhatia
2008	Thermal aware FPGA architectures and CAD.	Shilpa Bhoj
2008	FPGA implementation of a flexible decoder for long LDPC codes.	Christiane Beuschel, Hans-Jrg Pfleiderer
2008	Towards benchmarking energy efficiency of reconfigurable architectures.	Tobias Becker, Peter Jamieson, Wayne Luk, Peter Y. K. Cheung, Tero Rissa
2008	A computation- and communication- infrastructure for modular special instructions in a dynamically reconfigurable processor.	Lars Bauer, Muhammad Shafique, Jrg Henkel
2008	Connected components analysis of streamed images.	Donald G. Bailey, Christopher T. Johnston, Ni Ma
2008	Secure FPGA configuration architecture preventing system downgrade.	Benot Badrignans, Reouven Elbaz, Lionel Torres
2008	Fine grain reconfigurable architectures.	Josef Angermeier, Mateusz Majer, Jrgen Teich, Lars Braun, Tobias Schwalb, Philipp Graf, Michael Hbner, Jrgen Becker, Enno Lbbers, Marco Platzner, Christopher Claus, Walter Stechele, Andreas Herkersdorf, Markus Rullmann, Renate Merker
2008	Separable implementation of the second order Volterra filter (SOVF) in Xilinx Virtex-E FPGA.	Mamoun F. Al-Mistarihi
2008	A rate-based prefiltering approach to blast acceleration.	Panagiotis Afratis, Euripides Sotiriades, Grigorios Chrysos, Sotiria Fytraki, Dionisios N. Pnevmatikatos
2008	Parallel hardware objects for dynamically partial reconfiguration.	Norbert Abel, Frederik Grll, Nick Meier, Andreas Beyer, Udo Kebschull
2007	A Power Estimation Model for an FPGA-based Softcore Processor.	Peter Zipf, Heiko Hinkelmann, Lei Deng, Manfred Glesner, Holger Blume, Tobias G. Noll
2007	Fast On-line Task Placement and Scheduling on Reconfigurable Devices.	Xuegong Zhou, Ying Wang, XunZhang Huang, Chenglian Peng
2007	AdaBoost Engine.	Pavel Zemck, Martin Zdnk
2007	Disjoint Pattern Enumeration for Custom Instructions Identification.	Pan Yu, Tulika Mitra
2007	VPH - A Tool for Exploring Hybrid FPGAs.	Chi Wai Yu
2007	FPGA Implementation of a Data-Driven Stochastic Biochemical Simulator with the Next Reaction Method.	Masato Yoshimi, Yow Iwaoka, Yuri Nishikawa, Toshinori Kojima, Yasunori Osana, Akira Funahashi, Noriko Hiroi, Yuichiro Shibata, Naoki Iwanaga, Hideki Yamada, Hiroaki Kitano, Hideharu Amano
2007	DWARV: DelftWorkBench Automated Reconfigurable VHDL Generator.	Yana Yankova, Koen Bertels, Georgi Kuzmanov, Georgi Gaydadjiev, Yi Lu, Stamatis Vassiliadis
2007	High speed tablation system using an FPGA designed for distribution tables of frequent DNA subsequences.	Yoshiki Yamaguchi, Tsutomu Maruyama, Fumikazu Konishi, Akihiko Konagaya
2007	A Combining technique of rate law functions for a cost-effective reconfigurable biological simulator.	Hideki Yamada, Naoki Iwanaga, Yuichiro Shibata, Yasunori Osana, Masato Yoshimi, Yow Iwaoka, Yuri Nishikawa, Toshinori Kojima, Hideharu Amano, Akira Funahashi, Noriko Hiroi, Hiroaki Kitano, Kiyoshi Oguri

1,751–1,775 of 3,233← Previous Next →

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