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Field Programmable Logic and Applications

FPL

B

CORE rank

CORE rank (raw)

B

Fields of research

Computer Systems Engineering

Papers indexed

3,233

1994–2025

Papers per year

1994182 peak2025

FPL papers

3,233 records sourced from DBLP. Search titles, filter by year, sort by recency.

YearTitleAuthors
2003Power-Efficient Implementations of Multimedia Applications on Reconfigurable Platforms.Konstantinos Tatas, Kostas Siozios, Dimitrios Soudris, Adonios Thanailakis
2003Adaptive Processor: A Dynamically Reconfiguration Technology for Stream Processing.Shigeyuki Takano
2003Branch Optimisation Techniques for Hardware Compilation.Henry Styles, Wayne Luk
2003Heuristics for Onine Scheduling Real-Time Tasks to Partially Reconfigurable Devices.Christoph Steiger, Herbert Walder, Marco Platzner
2003Using Multiplexers for Control and Data in D-Fabrix.Tony Stansfield
2003Power Analysis of FPGAs: How Practical is the Attack?Franois-Xavier Standaert, Loc van Oldeneel tot Oldenzeel, David Samyde, Jean-Jacques Quisquater
2003Prototyping for the Concurrent Development.Ludovico de Souza, Philip J. Ryan, Jason Crawford, Kevin Wong, Gregory B. Zyner, Tom McDermott
2003An FPL Bioinspired Visual Encoding System to Stimulate Cortical Neurons in Real-Time.Leonel Sousa, Pedro Toms, Francisco J. Pelayo, Antonio Martnez-lvarez, Christian A. Morillas, Samuel F. Romero
2003Fast, Large-Scale String Match for a 10Gbps FPGA-Based Network Intrusion Detection System.Ioannis Sourdis, Dionisios N. Pnevmatikatos
2003High-Level Design Tools for FPGA-Based Combinatorial Accelerators.Valery Sklyarov, Iouliia Skliarova, Pedro Almeida, Manuel Almeida
2003Reconfigurable Systems in Education.Valery Sklyarov, Iouliia Skliarova
2003Reconfigurable Hardware SAT Solvers: A Survey of Systems.Iouliia Skliarova, Antnio de Brito Ferrari
2003Hardware-Software Codesign in Embedded Asymmetric Cryptographiy Application - A Case Study.Martin Simka, Viktor Fischer, Milos Drutarovsk
2003Performance and Area Modeling of Cmplete FPGA Designs in the Presence of Loop Transformations.K. R. Shesha Shayee, Joonseok Park, Pedro C. Diniz
2003A Reconfigurable Platform for Real-Time Embedded Video Image Processing.N. Pete Sedcole, Peter Y. K. Cheung, George A. Constantinides, Wayne Luk
2003A TCP/IP Based Multi-device Programming Circuit.David V. Schuehler, Harvey Ku, John W. Lockwood
2003Extra-dimensional Island-Style FPGAs.Herman Schmit
2003Fast Region Labeling on the Reconfigurable Platform ACE-V.Christian Schmidt, Andreas Koch
2003Architecture Template and Design Flow to Support Applications Parallelism on Reconfigurable Platforms.Sergej Sawitzki, Rainer G. Spallek
2003Two Approaches for a Single-Chip FPGA Implementation of an Encryptor/Decryptor AES Core.Nazar Abbas Saqib, Francisco Rodrguez-Henrquez, Arturo Daz-Prez
2003An FPGA-Based Performance Analysis of the Unrolling, Tiling, and Pipelining of the AES Algorithm.Giacinto Paolo Saggese, Antonino Mazzeo, Nicola Mazzocca, Antonio G. M. Strollo
2003Globally Asynchronous Locally Synchronous FPGA Architectures.Andrew Royal, Peter Y. K. Cheung
2003Design Strategies and Modified Descriptions to Optimize Cipher FPGA Implementations: Fast and Compact Results for DES and Triple-DES.Gal Rouvroy, Franois-Xavier Standaert, Jean-Jacques Quisquater, Jean-Didier Legat
2003Customisable Core-Based Architectures for Real-Time Motion Estimation on FPGAs.Nuno Roma, Tiago Dias, Leonel Sousa
2003Run-Time Minimization of Reconfiguration Overhead in Dynamically Reconfigurable Systems.Javier Resano, Daniel Mozos, Diederik Verkest, Serge Vernalde, Francky Catthoor
2,4512,475 of 3,233← PreviousNext →

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