| 2015 | Mitigation of fail-stop failures in integer matrix products via numerical packing. | Ijeoma Anarado, Yiannis Andreopoulos |
| 2015 | Failure mitigation in linear, sesquilinear and bijective operations on integer data streams via numerical entanglement. | Mohammad Ashraful Anam, Yiannis Andreopoulos |
| 2015 | A call for cross-layer and cross-domain reliability analysis and management. | Dan Alexandrescu, Adrian Evans, Enrico Costenaro, Maximilien Glorieux |
| 2015 | The future of fault tolerant computing. | Jacob A. Abraham, Ravishankar K. Iyer, Dimitris Gizopoulos, Dan Alexandrescu, Yervant Zorian |
| 2014 | Exploiting a fast and simple ECC for scaling supply voltage in level-1 caches. | Gulay Yalcin, Emrah Islek, Oyku Tozlu, Pedro Reviriego, Adrin Cristal, Osman S. Unsal, Oguz Ergin |
| 2014 | New approaches for synthesis of redundant combinatorial logic for selective fault tolerance. | Hao Xie, Li Chen, Rui Liu, Adrian Evans, Dan Alexandrescu, Shi-Jie Wen, Rick Wong |
| 2014 | An innovative standard cells remapping method for in-circuit critical parameters monitoring. | Loic Welter, Philippe Dreux, Hassen Aziza, Jean-Michel Portal |
| 2014 | Permanent faults on LIN networks: On-line test generation. | Anna Vaskova, Marta Portela-Garca, Mario Garca-Valderas, Celia Lpez-Ongil, Matteo Sonza Reorda |
| 2014 | Preliminary results of SEU fault-injection on multicore processors in AMP mode. | Vanessa Vargas, Pablo Ramos, Wassim Mansour, Raoul Velazco, Nacer-Eddine Zergainoh, Jean-Franois Mhaut |
| 2014 | Framework for economical error recovery in embedded cores. | Gaurang Upasani, Xavier Vera, Antonio Gonzlez |
| 2014 | Multivariate outlier modeling for capturing customer returns - How simple it can be. | Jeff Tikkanen, Nik Sumikawa, Li-C. Wang, Magdy S. Abadir |
| 2014 | Power-aware optimization of software-based self-test for L1 caches in microprocessors. | George Theodorou, Nektarios Kranitis, Antonis M. Paschalis, Dimitris Gizopoulos |
| 2014 | Flip-flop selection for in-situ slack-time monitoring based on the activation probability of timing-critical paths. | Sbastien Sarrazin, Samuel Evain, Ivan Miro Panades, Lirida Alves de Barros Naviner, Valentin Gherman |
| 2014 | Error masking with approximate logic circuits using dynamic probability estimations. | Antonio Sanchez-Clemente, Luis Entrena, Mario Garca-Valderas |
| 2014 | Cost-efficient of a cluster in a mesh SRAM-based FPGA. | Saif-Ur Rehman, Mounir Benabdenbi, Lorena Anghel |
| 2014 | Fault injection and fault handling: An MPSoC demonstrator using IEEE P1687. | Kim Petersn, Dimitar Nikolov, Urban Ingelsson, Gunnar Carlsson, Farrokh Ghani Zadegan, Erik Larsson |
| 2014 | Dependable reconfigurable space systems: Challenges, new trends and case studies. | Antonis M. Paschalis, Harald Michalik, Nektarios Kranitis, Celia Lpez-Ongil, Pedro Reviriego Vasallo |
| 2014 | A placement strategy for reducing the effects of multiple faults in digital circuits. | Samuel N. Pagliarini, Dhiraj K. Pradhan |
| 2014 | A hybrid reliability assessment method and its support of sequential logic modelling. | Samuel N. Pagliarini, Lirida A. B. Naviner, Jean-Franois Naviner, Dhiraj K. Pradhan |
| 2014 | Novel self-test methods to reduce on-chip memory requirements and improved test coverage. | Prakash Narayanan, Satish Ravichandran, Balaji Ramayanam |
| 2014 | Timing for virtual TMR in logic circuits. | Sebastian Mller, Tobias Koal, Mario Schlzel, Heinrich Theodor Vierhaus |
| 2014 | A noise-tolerant master-slave flip-flop. | Yukiya Miura, Yoshihiro Ohkawa |
| 2014 | Improving the significance of probabilistic circuit fault emulations. | David May, Walter Stechele |
| 2014 | Effect of ionizing radiation on TRNGs for safe telecommunications: Robustness and randomness. | Honorio Martn, Anna Vaskova, Celia Lpez-Ongil, Enrique San Milln, Marta Portela-Garca |
| 2014 | Two complementary approaches for studying the effects of SEUs on HDL-based designs. | Wassim Mansour, Miguel A. Aguirre, Hiplito Guzmn-Miranda, Javier Barrientos Rojas, Raoul Velazco |