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On-Line Testing and Robust System Design

IOLTS

C

CORE rank

CORE rank (raw)

C

Fields of research

Computer Systems Engineering · Software Engineering

Papers indexed

1,346

2000–2026

Papers per year

200069 peak2026

IOLTS papers

1,346 records sourced from DBLP. Search titles, filter by year, sort by recency.

YearTitleAuthors
2013Error detection encoding for multi-threshold capture mechanism.Kedar Karmarkar, Spyros Tragoudas
2013Exploiting application resiliency for energy-efficient and adequately-reliable operation.Georgios Karakonstantis, David Atienza, Andy Burg
2013Online error detection in multiprocessor chips: A test scheduling study.Manolis Kaliorakis, Nikos Foutris, Dimitris Gizopoulos, Mihalis Psarakis, Antonis M. Paschalis
2013Evaluating a low cost robustness improvement in SRAM-based FPGAs.Mohamed Ben Jrad, Rgis Leveugle
2013A post-deployment IC trust evaluation architecture.Yier Jin, Dzmitry Maliuk, Yiorgos Makris
2013At-speed BIST for interposer wires supporting on-the-spot diagnosis.Shi-Yu Huang, Jeo-Yen Lee, Kun-Han Tsai, Wu-Tung Cheng
2013A high throughput configurable parallel encoder architecture for Quasi-Cyclic Low-Density Parity-Check Codes.Alaa Aldin Al Hariri, Fabrice Monteiro, Loc Siler, Abbas Dandache
2013Measuring the performance impact of permanent faults in modern microprocessor architectures.Nikos Foutris, Dimitris Gizopoulos, John Kalamatianos, Vilas Sridharan
2013Hierarchical RTL-based combinatorial SER estimation.Adrian Evans, Dan Alexandrescu, Enrico Costenaro, Liang Chen
2013A radiation tolerant and self-repair memory cell.Nikolaos Eftaxiopoulos-Sarris, Georgios Zervakis, Kostas Tsoumanis, Kiamal Z. Pekmestzi
2013Exploiting the debug interface to support on-line test of control flow errors.Boyang Du, Matteo Sonza Reorda, Luca Sterpone, Luis Parra, Marta Portela-Garca, Almudena Lindoso, Luis Entrena
2013Fault-tolerant adaptive routing under permanent and temporary failures for many-core systems-on-chip.Michael G. Dimopoulos, Yi Gang, Mounir Benabdenbi, Lorena Anghel, Nacer-Eddine Zergainoh, Michael Nicolaidis
2013A smart test controller for scan chains in secure circuits.Jean DaRolt, Giorgio Di Natale, Marie-Lise Flottes, Bruno Rouzeyre
2013Error resilient logic circuits under dynamic variations.Kwanyeob Chae, Saibal Mukhopadhyay
2013Increasing fault coverage during functional test in the operational phase.Mauricio de Carvalho, Paolo Bernardi, Ernesto Snchez, Matteo Sonza Reorda, Oscar Ballan
2013EfStefano Di Carlo, Salvatore Galfano, Marco Indaco, Paolo Prinetto
2013Increasing the robustness of CUDA Fermi GPU-based systems.Stefano Di Carlo, Giulio Gambardella, Marco Indaco, Ippazio Martella, Paolo Prinetto, Daniele Rolfo, Pascal Trotta
2013Timing vulnerability factors of sequential elements in modern microprocessors.Arkady Bramnik, Andrei Sherban, Norbert Seifert
2013Accurate alpha soft error rate evaluation in SRAM memories.Sebasti A. Bota, Gabriel Torrens, Ivan de Pal, Bartomeu Alorda, L. A. Segura
2013Variability-aware and fault-tolerant self-adaptive applications for many-core chips.Gilles Bizot, Fabien Chaix, Nacer-Eddine Zergainoh, Michael Nicolaidis
2013Real-time checking of linear control systems using analog checksums.Suvadeep Banerjee, Aritra Banerjee, Abhijit Chatterjee, Jacob A. Abraham
2013A software-based self-test strategy for on-line testing of the scan chain circuitries in embedded microprocessors.Oscar Ballan, Paolo Bernardi, B. Yazdani, Ernesto Snchez
2013Algorithm transformation methods to reduce software-only fault tolerance techniques' overhead.Jos Rodrigo Azambuja, Gustavo Brown, Fernanda Lima Kastensmidt, Luigi Carro
2013A fully-automated flow for ITAR-free rad-hard Atmel FPGAs.Nikos Andrikos, Massimo Violante, David Merodio Codinachs
2013Highly-reliable integer matrix multiplication via numerical packing.Ijeoma Anarado, Mohammad Ashraful Anam, Davide Anastasia, Fabio Verdicchio, Yiannis Andreopoulos
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