On-Line Testing and Robust System Design

IOLTS

CORE rank

CORE rank (raw)

Fields of research

Computer Systems Engineering · Software Engineering

Papers indexed

1,346

2000–2026

Best Software Engineering conferences Best Computer Systems Engineering conferences

Papers per year

200069 peak2026

Most published authors

IOLTS papers

1,346 records sourced from DBLP. Search titles, filter by year, sort by recency.

Year	Title	Authors
2013	Scan attack in presence of mode-reset countermeasure.	Sk Subidh Ali, Samah Mohamed Saeed, Ozgur Sinanoglu, Ramesh Karri
2013	State-aware single event analysis for sequential logic.	Dan Alexandrescu, Enrico Costenaro, Adrian Evans
2013	Scanning the strength of a test signal to monitor electrode degradation within bio-fluidic microsystems.	Qais Al-Gayem, Hong Liu, Haroon Khan, Andrew Richardson
2013	Video decoder monitoring using non-linear regression.	Brice Ekobo Akoa, Emmanuel Simeu, Fritz Lebowsky
2012	Neutron-induced soft error rate estimation for SRAM using PHITS.	Shusuke Yoshimoto, Takuro Amashita, Masayoshi Yoshimura, Yusuke Matsunaga, Hiroto Yasuura, Shintaro Izumi, Hiroshi Kawaguchi, Masahiko Yoshimoto
2012	Fault coverage of a timing and control flow checker for hard real-time systems.	Julian Wolf, Bernhard Fechner, Theo Ungerer
2012	Reliable and secure memories based on algebraic manipulation correction codes.	Zhen Wang, Mark G. Karpovsky
2012	A real-case application of a synergetic design-flow-oriented SER analysis.	Miguel Vilchis, Ramnath Venkatraman, Enrico Costenaro, Dan Alexandrescu
2012	Evaluation of test algorithms stress effect on SRAMs under neutron radiation.	Georgios Tsiligiannis, Luigi Dilillo, Alberto Bosio, Patrick Girard, Aida Todri, Arnaud Virazel, Antoine D. Touboul, Frederic Wrobel, Frdric Saign
2012	Cross-level protection of circuits against faults and malicious attacks.	Victor Tomashevich, Sudarshan Srinivasan, Fabian Foerg, Ilia Polian
2012	Test access mechanism for chips with spare identical cores.	Ozgur Sinanoglu
2012	SEU tolerant robust memory cell design.	Mohammed Shayan, Virendra Singh, Adit D. Singh, Masahiro Fujita
2012	Logic masking for SET Mitigation Using Approximate Logic Circuits.	Antonio Sanchez-Clemente, Luis Entrena, Mario Garca-Valderas, Celia Lpez-Ongil
2012	On the functional test of L2 caches.	Michele Riga, Ernesto Snchez, Matteo Sonza Reorda
2012	Low Power embedded DRAM caches using BCH code partitioning.	Pedro Reviriego, Alfonso Snchez-Macin, Juan Antonio Maestro
2012	Neutron radiation test of graphic processing units.	Paolo Rech, Caroline Aguiar, Ronaldo Rodrigues Ferreira, Christopher Frost, Luigi Carro
2012	Soft-errors resilient logic optimization for low power.	Sujan Pandey, Klaas Brink
2012	The influence of clock-gating on NBTI-induced delay degradation.	Jackson Pachito, Celestino V. Martins, Jorge Semio, Marcelino Bicho Dos Santos, Isabel C. Teixeira, Joo Paulo Teixeira
2012	Through-silicon-via built-in self-repair for aggressive 3D integration.	Michael Nicolaidis, Vladimir Pasca, Lorena Anghel
2012	Punctured Karpovsky-Taubin binary robust error detecting codes for cryptographic devices.	Yaara Neumeier, Osnat Keren
2012	Architectural vulnerability aware checkpoint placement in a multicore processor.	Atieh Lotfi, Arash Bayat, Saeed Safari
2012	SEU sensitivity of robust communication protocols.	Celia Lpez-Ongil, Marta Portela-Garca, Mario Garca-Valderas, Anna Vaskova, Luis Entrena, Joaqun Rivas-Abalo, Alberto Martn-Ortega, Javier Martinez-Oter, S. Rodriguez-Bustabad, Ignacio Arruego
2012	SETTOFF: A fault tolerant flip-flop for building Cost-efficient Reliable Systems.	Yang Lin, Mark Zwolinski
2012	Algorithmic techniques for robust applications.	Rakesh Kumar
2012	Error detection and correction of single event upset (SEU) tolerant latch.	Norhuzaimin Julai, Alexandre Yakovlev, Alexandre V. Bystrov

676–700 of 1,346← Previous Next →

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