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On-Line Testing and Robust System Design

IOLTS

C

CORE rank

CORE rank (raw)

C

Fields of research

Computer Systems Engineering · Software Engineering

Papers indexed

1,346

2000–2026

Papers per year

200069 peak2026

IOLTS papers

1,346 records sourced from DBLP. Search titles, filter by year, sort by recency.

YearTitleAuthors
2008Special Session 3 - Panel: SER in Automotive: what is the impact of the AEC Q100-G spec?Tino Heijmen
2008Developing Fault Injection Environment for Complex Experiments.Piotr Gawkowski, Janusz Sosnowski
2008Propagation of Transients Along Sensitizable Paths.Sreenivas Gangadhar, Michael N. Skoufis, Spyros Tragoudas
2008A Fault-Tolerant Attitude Determination System Based on COTS Devices.Ricardo de Oliveira Duarte, Luiz de Siqueira Martins-Filho, Guilherme F. T. Knop, Ricardo S. Prado
2008On Line Testing of Single Feedback Bridging Fault in Cluster Based FPGA by Using Asynchronous Element.Nachiketa Das, Pranab Roy, Hafizur Rahaman
2008A New Approach for Transient Fault Injection Using Symbolic Simulation.Ashish Darbari, Bashir M. Al-Hashimi, Peter Harrod, Daryl Bradley
2008Detailed Analyses of Single Laser Shot Effects in the Configuration of a Virtex-II FPGA.Gaetan Canivet, Jessy Cldire, Jean Baptiste Ferron, Frdric Valette, Marc Renaudin, Rgis Leveugle
2008SDRAM Architecture & Single Event Effects Revealed with Laser.Antonin Bougerol, Florent Miller, Nadine Buard
2008On the Evaluation of Radiation-Induced Transient Faults in Flash-Based FPGAs.Niccol Battezzati, Simone Gerardin, Andrea Manuzzato, Alessandro Paccagnella, Sana Rezgui, Luca Sterpone, Massimo Violante
2008Dynamic Scheduling of Test Routines for Efficient Online Self-Testing of Embedded Microprocessors.Nikolaos G. Bartzoudis, Vasileios Tantsios, Klaus D. McDonald-Maier
2008On the Detection of SSN-Induced Logic Errors through On-Chip Monitoring.Florence Azas, Laurent Larguier, Yves Bertrand, Michel Renovell
2008Embedding Current Monitoring in H-Tree RAM Architecture for Multiple SEU Tolerance and Reliability Improvement.Costas Argyrides, Fabian Vargas, Marlon Moraes, Dhiraj K. Pradhan
2008On the Minimization of Potential Transient Errors and SER in Logic Circuits Using SPFD.Sobeeh Almukhaizim, Yiorgos Makris, Yu-Shen Yang, Andreas G. Veneris
2008Special Session 4: Reliability and Circuit Simulation.Rob Aitken
2008On-Line Failure Detection and Confinement in Caches.Jaume Abella, Pedro Chaparro, Xavier Vera, Javier Carretero, Antonio Gonzlez
2007Design for Resilience to Soft Errors and Variations.Ming Zhang, T. M. Mak, James W. Tschanz, Kee Sup Kim, Norbert Seifert, Davia Lu
2007Embedding test patterns into Low-Power BIST sequences.Ioannis Voyiatzis
2007Surviving to Errors in Multi-Core Environments.Xavier Vera, Jaume Abella
2007Time-Sensitive Control-Flow Checking for Multitask Operating System-Based SoCs.Fabian Vargas, Leonardo Piccoli, Juliano Benfica, Antonio A. de Alecrim Jr., Marlon Moraes
2007LFSR Reseeding with Irreducible Polynomials.Snehal Udar, Dimitri Kagaris
2007Design of Embedded m-out-of-n Code Checkers Using Complete Parallel Counters.Steffen Tarnick
2007Accelerating Yield Ramp through Real-Time Testing.Sanjiv Taneja
2007Envelope Detection Based Transition Time Supervision for Online Testing of RF MEMS Switches.Emmanuel Simeu, Salvador Mir, R. Kherreddine, Hoang Nam Nguyen
2007On-line Dynamic Delay Insertion to Improve Signal Integrity in Synchronous Circuits.Jorge Semio, Judit Freijedo, Juan J. Rodrguez-Andina, Fabian Vargas, Marcelino B. Santos, Isabel C. Teixeira, Joo Paulo Teixeira
2007On Derating Soft Error Probability Based on Strength Filtering.Alodeep Sanyal, Sandip Kundu
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