| 2006 | Fault Tolerance Implementation within SRAM Based FPGA Design Based upon the Increased Level of Single Event Upset Susceptibility. | Melanie Berg |
| 2006 | Design of a Robust 8-Bit Microprocessor to Soft Errors. | Rodrigo Possamai Bastos, Fernanda Lima Kastensmidt, Ricardo Reis |
| 2006 | From Nuclear Reaction to System Failures: Can We Address All Levels of Soft Errors Accurately? | Lorena Anghel, Michael Nicolaidis, Nadine Buard |
| 2006 | Reliability Issues for Embedded SRAM at 90nm and Below. | Robert C. Aitken |
| 2006 | Floorplanning and Thermal Impact on Leakage Power and Proper Operation of Complex SOC Designs. | Magdy S. Abadir |
| 2005 | Impact of Soft Error Challenge on SoC Design. | Yervant Zorian, Valery A. Vardanian, K. Aleksanyan, K. Amirkhanyan |
| 2005 | Test Generation Methodology for High-Speed Floating Point Adders. | George Xenoulis, Mihalis Psarakis, Dimitris Gizopoulos, Antonis M. Paschalis |
| 2005 | IEEE Computer Society TTTC: Test Technology Technical Council. | |
| 2005 | Program Committee. | |
| 2005 | Organizing Committee. | |
| 2005 | Welcome. | |
| 2005 | Use of Nuclear Codes for Neutron-Induced Nuclear Reactions in Microelectronics. | Frederic Wrobel |
| 2005 | Accumulator-Based Weighted Pattern Generation. | Ioannis Voyiatzis, Dimitris Gizopoulos, Antonis M. Paschalis |
| 2005 | How to Characterize the Problem of SEU in Processors and Representative Errors Observed on Flight. | Raoul Velazco, R. Ecoffet, F. Faure |
| 2005 | On the Proposition of an EMI-Based Fault Injection Approach. | Fabian Vargas, D. L. Cavalcante, Edmundo Gatti, Drcio Prestes, Daniel Lupi |
| 2005 | Security Constraints in Integrated Circuits. | Laurent Sourgen |
| 2005 | A Software Based Online Memory Test for Highly Available Systems. | Amandeep Singh, Debashish Bose |
| 2005 | On-Line Testing of Globally Asynchronous Circuits. | Delong Shang, Alexandre V. Bystrov, Alexandre Yakovlev, Deepali Koppad |
| 2005 | Increasing Fault Tolerance to Multiple Upsets Using Digital Sigma-Delta Modulators. | Erik Schler, Luigi Carro |
| 2005 | Dynamic Fault Test and Diagnosis in Digital Systems Using Multiple Clock Schemes and Multi-VDD Test. | Marcial Jess Rodrguez-Irago, Juan J. Rodrguez-Andina, Fabian Vargas, Marcelino B. Santos, Isabel C. Teixeira, Joo Paulo Teixeira |
| 2005 | Efficient Estimation of SEU Effects in SRAM-Based FPGAs. | Matteo Sonza Reorda, Luca Sterpone, Massimo Violante |
| 2005 | How to Cope with SEU/SET at Chip Level? The Example of a Microprocessor Family. | Nicolas Renaud |
| 2005 | A Novel On-Chip Delay Measurement Hardware for Efficient Speed-Binning. | Arijit Raychowdhury, Swaroop Ghosh, Kaushik Roy |
| 2005 | A 32-Bit COTS-Based Fault-Tolerant Embedded System. | Amir Rajabzadeh |
| 2005 | A Hamming Distance Based Test Pattern Generator with Improved Fault Coverage. | Dhiraj K. Pradhan, Dimitri Kagaris, Rohit Gambhir |