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On-Line Testing and Robust System Design

IOLTS

C

CORE rank

CORE rank (raw)

C

Fields of research

Computer Systems Engineering · Software Engineering

Papers indexed

1,346

2000–2026

Papers per year

200069 peak2026

IOLTS papers

1,346 records sourced from DBLP. Search titles, filter by year, sort by recency.

YearTitleAuthors
2001Increasing the Fault Coverage in Multiple Clock Domain Systems by Using On-Line Testing of Synchronizers.Octavian Petre, Hans G. Kerkhoff
2001Built-In Self Test for Low Cost Testing of a 60 MHz Synchronous Flash Memory.Gaetano Palumbo, Giuseppe Introvaia, Vincenzo Mastrocola, Promod Kumar, Francesco Pipiton
2001Code-Disjoint Carry-Dependent Sum Adder with Partial Look-Ahead.Vitalij Ocheretnij, Michael Gssel, Egor S. Sogomonyan
2001Test-per-Clock Testing of the Circuits with Scan.Ondrej Novk, Jiri Nosek
2001Effectiveness and Limitations of Various Software Techniques for "Soft Error" Detection: A Comparative Study.Bogdan Nicolescu, Raoul Velazco, Matteo Sonza Reorda
2001Fast Configurable Polynomial Division for Error Control Coding Applications.Fabrice Monteiro, Abbas Dandache, Bernard Lepley
2001Smart Temperature Sensor for On-Line Monitoring in Automotive Applications.Jos Luis Merino, Sebasti A. Bota, A. Herms, Josep Samitier, Enric Cabruja, Xavier Jord, Miquel Vellveh, J. Bausells, A. Ferr, J. Bigorra
2001Totally Self-Checking FSM Design Based on Multilevel Synthesis Methods and FPGA Implemetation.Anzhela Yu. Matrosova, K. Nikitin, Olga Goloubeva
2001Mixed-Signal Circuit Classification in a Pseudorandom Testing Scheme.Cristoforo Marzocca, Francesco Corsi
2001Fault Tolerant Automotive Systems: An Overview.Alberto Manzone, Alessandro Pincetti, Diego De Costantini
2001A New Laser System for X-Rays Flashes Sensitivity Evaluation.Dean Lewis, Herv Lapuyade, Yann Deval, Yvan Maidon, Frdric Darracq, Renaud Briand, Pascal Fouillat
2001An Approach for Designing On-Line Testable State Machines.Parag K. Lala, Mark G. Karpovsky
2001Testing FPGA Delay Faults in the System Environment is Very Different from "Ordinary" Delay Fault Testing.Andrzej Krasniewski
2001Fault Tolerant ICs by Area-Optimized Error Correcting Codes.Richard P. Kleihorst, Nico F. Benschop
2001On-Line Multiple-Fault-Detection of Fuzzy Controllers.Naotake Kamiura, Teijiro Isokawa, Nobuyuki Matsui, Kazuharu Yamato
2001A New Reseeding Technique for LFSR-Based Test Pattern Generation.Emmanouil Kalligeros, Xrysovalantis Kavousianos, Dimitris Bakalis, Dimitris Nikolos
2001Using a WLFSR to Embed Test Pattern Pairs in Minimum Time.Dimitri Kagaris, Spyros Tragoudas
2001A Study of the Experimental Validation of Fault-Tolerant Systems Using Different VHDL-Based Fault Injection Techniques.Joaquin Gracia, Juan Carlos Baraza, Daniel Gil, Pedro J. Gil
2001Supporting Fault Tolerance in an Industrial Environment: The AMATISTA Approach.Isabel Gonzlez, Luis Berrojo
2001Design and Test of Certifiable ASICs for Safety-Critical Gas Burners Contro.Fernando M. Gonalves, Marcelino B. Santos, Isabel C. Teixeira, Joo Paulo Teixeira
2001DRAFT: An On-Line Fault Detection Method for Dynamic and Partially Reconfigurable FPGAs.Manuel G. Gericota, Gustavo R. Alves, Miguel L. Silva, Jos M. Ferreira
2001Analyzing Fault Effects in Fault Insertion Experiments.Piotr Gawkowski, Janusz Sosnowski
2001Single Output Distributed Two-Rail Checker with Diagnosing Capabilities for Bus Based Self-Checking Architectures.Michele Favalli, Cecilia Metra
2001Logic Optimization of Unidirectional Circuits with Structural Methods.Luis Entrena, Celia Lpez, Emilio Olas, Enrique San Milln, Jos Alberto Espejo
2001Automatic Insertion of Fault-Tolerant Structures at the RT Level.Luis Entrena, Celia Lpez, Emilio Olas
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