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IEEE International Test Conference

ITC

A

CORE rank

CORE rank (raw)

A

Fields of research

Computer Systems Engineering

Papers indexed

4,920

1981–2025

Papers per year

1981207 peak2025

ITC papers

4,920 records sourced from DBLP. Search titles, filter by year, sort by recency.

YearTitleAuthors
1998Analysis of pattern-dependent and timing-dependent failures in an experimental test chip.Jonathan T.-Y. Chang, Chao-Wen Tseng, Chien-Mo James Li, Mike Purtell, Edward J. McCluskey
1998Detecting resistive shorts for CMOS domino circuits.Jonathan T.-Y. Chang, Edward J. McCluskey
1998A novel combinational testability analysis by considering signal correlation.Shih-Chieh Chang, Shi-Sen Chang, Wen-Ben Jone, Chien-Chung Tsai
1998A scalable architecture for VLSI test.Ed Chang, David Cheung, Robert E. Huston, Jim Seaton, Gary Smith
1998Failure mechanisms and fault classes for CMOS-compatible microelectromechanical systems.A. Castillejo, D. Veychard, Salvador Mir, Jean-Michel Karam, Bernard Courtois
1998Stuck-at fault: a fault model for the next millennium.Janak H. Patel
1998The stuck-at fault: it ain't over 'til it's over.Kenneth M. Butler
1998Testing mixed signal SOCs.Mark Burns
1998Modeling the unknown! Towards model-independent fault and error diagnosis.Vamsi Boppana, Masahiro Fujita
1998Static test sequence compaction based on segment reordering and accelerated vector restoration.Surendra Bommu, Srimat T. Chakradhar, Kiran B. Doreswamy
1998Testing a multichip package for a consumer communications application.Alex S. Biewenga, Math Muris, Rodger Schuttert, Urs Fawer
1998A highly testable and diagnosable fabrication process test chip.Dilip K. Bhavsar, Ugonna Echeruo, David R. Akeson, William J. Bowhill
1998Testability access of the high speed test features in the Alpha 21264 microprocessor.Dilip K. Bhavsar, David R. Akeson, Michael K. Gowan, Daniel B. Jackson
1998A fault injection environment for microprocessor-based boards.Alfredo Benso, Paolo Prinetto, Maurizio Rebaudengo, Matteo Sonza Reorda
1998Can model-based and case-based expert systems operate together?Moshe Ben-Bassat, Israel Beniaminy, David Joseph
1998Spice up your life: simulate mixed-signal ICs!Keith Baker
1998Digital oscillation-test method for delay and stuck-at fault testing of digital circuits.Karim Arabi, Hassan Ihs, Christian Dufaza, Bozena Kaminska
1998Generating interconnect models from prototype hardware.Frank W. Angelotti
1998Integrated probe card/interface solutions for specific test applications.Jim Anderson
1998On-line testing of scalable signal processing architectures using a software test method.Chouki Aktouf, Ghassan Al Hayek, Chantal Robach
1998On-chip versus off-chip test: an artificial dichotomy.Robert C. Aitken
1998Scan chain design for test time reduction in core-based ICs.Joep Aerts, Erik Jan Marinissen
1998Quad DCVS dynamic logic fault modeling and testing.R. Dean Adams, Edmond S. Cooley, Patrick R. Hansen
1997Test Requirements for Embedded Core-Based Systems and IEEE P1500.Yervant Zorian
1997Dynamic Testing of ADCs Using Wavelet Transforms.Takahiro J. Yamaguchi, Mani Soma
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